SEMICONDUCTOR DEVICES
Li Li, Liu Hongxia, Dong Cui and Zhou Wen
Abstract: The characteristics of a low-voltage triggering silicon-controlled rectifier (LVTSCR) under a transmission line pulse (TLP) and the characteristics of high frequency are analyzed. The research results show that the anode series resistance has a significant effect on the key points of the snapback curve. The device characteristics can fit the requirements of a electrostatic discharge (ESD) design window by adjusting the anode series resistance. Furthermore, the set-up time of the ESD has an influence on the turn-on voltage of the LVTSCR. A steep rising edge will cause the turn-on voltage to increase. The parasitic capacitance of the device for different voltage biases and frequencies determines the capacitive impedance, and its accuracy calculation is very important to the ESD design of high frequency circuits. Our research results provide a theoretical basis for the design of an ultra-deep sub-micron (UDSM) LVTSCR structure under ESD stress and the improvement of TLP test technology.
Key words: UDSM (ultra-deep sub-micron), ESD (Electrostatic Discharge), TLP (Transmission Line Pulse), LVTSCR (Low-Voltage Triggering Silicon-controlled Rectifier)
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Received: Revised: 30 December 2010 Online: Published: 01 May 2011
| Citation: |
Li Li, Liu Hongxia, Dong Cui, Zhou Wen. Characterization Analysis of UDSM LVTSCR Under TLP Stress[J]. Journal of Semiconductors, 2011, 32(5): 054002. doi: 10.1088/1674-4926/32/5/054002
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Li L, Liu H X, Dong C, Zhou W. Characterization Analysis of UDSM LVTSCR Under TLP Stress[J]. J. Semicond., 2011, 32(5): 054002. doi: 10.1088/1674-4926/32/5/054002.
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