Abstract: Some research efforts to improve the efficiency and noise performance of buck DC–DC converters are explored. A carefully designed power MOSFET driver, including a dead time controller, discontinuous current mode (DCM) controller and gate width controller, is proposed to improve efficiency. Instead of PWM modulation, sigma–delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike. The proposed converter has been designed and fabricated by a 0.35 μm CMOS process. Measured results show that the peak efficiency of the converter can reach 93% and sigma–delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.

Key words: buck DC–DC converter, PWM modulation, sigma–delta modulation, DCM, dead time control, width control, current sensing