Abstract: Abstract: Two different LNA design techniques, namely the classical two-port technique and Shaeffer’s technique, have been introduced, compared and implemented for practical design. Their merits and drawbacks are also discussed. The paper mainly focuses on the former technique, which is seldom introduced in traditional papers. Since a parasitic capacitor of transistor is included in the computation of the former technique, the errors caused by the ignorance of the capacitor have been minimized, which is superior to traditional techniques. Using the former technique, a fully integrated LNA is realized with only 1.4dB while drawing 1.3 mA DC at 2.4 GHz for simulation results. Another version of LNA is designed using the latter technique, which has been fabricated.

Key words: LNA, noise optimization, two-port, on-chip inductor