J. Semicond. > 2012, Volume 33 > Issue 10 > 104003
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SEMICONDUCTOR DEVICES

High voltage SOI LDMOS with a compound buried layer

Luo Xiaorong, Hu Gangyi, Zhou Kun, Jiang Yongheng, Wang Pei, Wang Qi, Luo Yinchun, Zhang Bo and Li Zhaoji

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DOI: 10.1088/1674-4926/33/10/104003

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Abstract: An SOI LDMOS with a compound buried layer (CBL) was proposed. The CBL consists of an upper buried oxide layer (UBOX) with a Si window and two oxide steps, a polysilicon layer and a lower buried oxide layer (LBOX). In the blocking state, the electric field strengths in the UBOX and LBOX are increased from 88 V/μm of the buried oxide (BOX) in a conventional SOI (C-SOI) LDMOS to 163 V/μm and 460 V/μm by the holes located on the top interfaces of the UBOX and LBOX, respectively. Compared with the C-SOI LDMOS, the CBL LDMOS increases the breakdown voltage from 477 to 847 V, and lowers the maximal temperature by 6 K.

Key words: SOI, electric field, specific on-resistance, breakdown voltage

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    Received: 03 December 2014 Revised: 01 May 2012 Online: Published: 01 October 2012

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      Article Navigation >  Journal of Semiconductors  > 2012  >  33(10): 104003
      Luo Xiaorong, Hu Gangyi, Zhou Kun, Jiang Yongheng, Wang Pei, Wang Qi, Luo Yinchun, Zhang Bo, Li Zhaoji. High voltage SOI LDMOS with a compound buried layer[J]. Journal of Semiconductors, 2012, 33(10): 104003. doi: 10.1088/1674-4926/33/10/104003 ****Luo X R, Hu G Y, Zhou K, Jiang Y H, Wang P, Wang Q, Luo Y C, Zhang B, Li Z J. High voltage SOI LDMOS with a compound buried layer[J]. J. Semicond., 2012, 33(10): 104003. doi: 10.1088/1674-4926/33/10/104003.
      Citation:
      Luo Xiaorong, Hu Gangyi, Zhou Kun, Jiang Yongheng, Wang Pei, Wang Qi, Luo Yinchun, Zhang Bo, Li Zhaoji. High voltage SOI LDMOS with a compound buried layer[J]. Journal of Semiconductors, 2012, 33(10): 104003. doi: 10.1088/1674-4926/33/10/104003 ****
      Luo X R, Hu G Y, Zhou K, Jiang Y H, Wang P, Wang Q, Luo Y C, Zhang B, Li Z J. High voltage SOI LDMOS with a compound buried layer[J]. J. Semicond., 2012, 33(10): 104003. doi: 10.1088/1674-4926/33/10/104003.
      shu

      High voltage SOI LDMOS with a compound buried layer

      DOI: 10.1088/1674-4926/33/10/104003

      • Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 China

      • Received Date: 2014-12-03
      • Accepted Date: 2012-03-15
      • Revised Date: 2012-05-01
      • Published Date: 2012-09-10

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