Design and implementation of a 3-A source and sink linear regulator for bus terminators

Li Yanming; Mao Xiangyu; Wen Changbao; Wen Limin

doi:10.1088/1674-4926/33/10/105011

J. Semicond. > 2012, Volume 33 > Issue 10 > 105011

SEMICONDUCTOR INTEGRATED CIRCUITS

Design and implementation of a 3-A source and sink linear regulator for bus terminators

Li Yanming, Mao Xiangyu, Wen Changbao and Wen Limin

+ Author Affiliations

DOI: 10.1088/1674-4926/33/10/105011

Abstract: According to the requirements of the bus terminal regulator, a linear regulator with 3-A source-sink current ability is presented. The use of the NMOS pass transistor and load current feedback technique enhances the system current ability and response speed. The method of adaptive zero compensation realizes loop stability over the whole load range for either source or sink loop. Furthermore, the transconductance matching technique reduces the shoot-through current through the output stage to less than 3 μA. The regulator has been fabricated with a 0.6-μm 30 V BCD process successfully, and the area size is about 1 mm². With a 20 μF output capacitor, the maximum transient output-voltage variation is within 3.5% of the output voltage with load step changes of ±2 A/1 μs. At the load range of ±3 A, the variation of output voltage is less than ±15 mV.

Key words: bus termination regulator, linear regulator, fast response, power management IC

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Li Yanming, Mao Xiangyu, Wen Changbao, Wen Limin. Design and implementation of a 3-A source and sink linear regulator for bus terminators[J]. Journal of Semiconductors, 2012, 33(10): 105011. doi: 10.1088/1674-4926/33/10/105011

Li Y M, Mao X Y, Wen C B, Wen L M. Design and implementation of a 3-A source and sink linear regulator for bus terminators[J]. J. Semicond., 2012, 33(10): 105011. doi: 10.1088/1674-4926/33/10/105011.

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Received: 20 August 2015 Revised: 19 April 2012 Online: Published: 01 October 2012

According to the requirements of the bus terminal regulator, a linear regulator with 3-A source-sink current ability is presented. The use of the NMOS pass transistor and load current feedback technique enhances the system current ability and response speed. The method of adaptive zero compensation realizes loop stability over the whole load range for either source or sink loop. Furthermore, the transconductance matching technique reduces the shoot-through current through the output stage to less than 3 μA. The regulator has been fabricated with a 0.6-μm 30 V BCD process successfully, and the area size is about 1 mm². With a 20 μF output capacitor, the maximum transient output-voltage variation is within 3.5% of the output voltage with load step changes of ±2 A/1 μs. At the load range of ±3 A, the variation of output voltage is less than ±15 mV.

Design and implementation of a 3-A source and sink linear regulator for bus terminators

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Design and implementation of a 3-A source and sink linear regulator for bus terminators

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Design and implementation of a 3-A source and sink linear regulator for bus terminators

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