A 72-dB-SNDR rail-to-rail successive approximation ADC using mismatch calibration techniques

Liu Yan; Hua Siliang; Wang Donghui; Hou Chaohuan

doi:10.1088/1674-4926/33/12/125009

J. Semicond. > 2012, Volume 33 > Issue 12 > 125009

SEMICONDUCTOR INTEGRATED CIRCUITS

A 72-dB-SNDR rail-to-rail successive approximation ADC using mismatch calibration techniques

Liu Yan, Hua Siliang, Wang Donghui and Hou Chaohuan

+ Author Affiliations

DOI: 10.1088/1674-4926/33/12/125009

Abstract: When the voltage of an analog input signal is equal to the supply voltage, it is difficult for a conventional successive approximation ADC to correctly convert the analog signal into digital signal. This paper introduces an improved successive approximation ADC, which can convert the rail-to-rail input range and reduce sampling time through a track-and-hold circuit. Comparator offset cancellation and capacitor self-calibration techniques are used in this ADC. Measurement results show that the peak SNDR of this ADC reaches 72 dB and the signal effective bandwidth is up to 1.25 MHz. It consumes 1 mW in the test, and the figure of merit is 123 fJ/conversion-step.

Key words: rail-to-rail, mismatch calibration, THA, successive approximation ADC

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Liu Yan, Hua Siliang, Wang Donghui, Hou Chaohuan. A 72-dB-SNDR rail-to-rail successive approximation ADC using mismatch calibration techniques[J]. Journal of Semiconductors, 2012, 33(12): 125009. doi: 10.1088/1674-4926/33/12/125009

Liu Y, Hua S L, Wang D H, Hou C H. A 72-dB-SNDR rail-to-rail successive approximation ADC using mismatch calibration techniques[J]. J. Semicond., 2012, 33(12): 125009. doi: 10.1088/1674-4926/33/12/125009.

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Received: 21 August 2015 Revised: 18 July 2012 Online: Published: 01 December 2012

When the voltage of an analog input signal is equal to the supply voltage, it is difficult for a conventional successive approximation ADC to correctly convert the analog signal into digital signal. This paper introduces an improved successive approximation ADC, which can convert the rail-to-rail input range and reduce sampling time through a track-and-hold circuit. Comparator offset cancellation and capacitor self-calibration techniques are used in this ADC. Measurement results show that the peak SNDR of this ADC reaches 72 dB and the signal effective bandwidth is up to 1.25 MHz. It consumes 1 mW in the test, and the figure of merit is 123 fJ/conversion-step.

A 72-dB-SNDR rail-to-rail successive approximation ADC using mismatch calibration techniques

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