Abstract: This paper describes the design and test of a novel custom driving circuit for multi-quantum-well (MQW) spatial light modulators (SLMs). Unlike previous solutions, we integrated all blocks in one chip to synchronize the control logic circuit and the driving circuits. Single-slope digital-to-analog converters (DACs) inside each pixel are not adopted because it is difficult to eliminate capacitor mismatch. 64 column-shared 8-bit resistor-string DACs are utilized to provide programmable output voltages from 0.5 to 3.8 V. They are located on the top of 64 × 64 driving pixels tightly to match each other with several dummies. Each DAC performs its conversion in 280 ns and draws 80 μA. For a high speed data transfer rate, the system adopts a 2-stage shift register that operates at 50 MHz and the modulating rate achieves 50 K frames/s while dissipating 302 mW from a 5-V supply. The die is fabricated in a 0.35 μm CMOS process and its area is 5.5 × 7 mm².

Key words: spatial light modulator, driving circuit, high speed, low power