
SEMICONDUCTOR INTEGRATED CIRCUITS
Abstract: This paper presents a 5 GHz CMOS radio frequency (RF) transceiver built with 0.18 μm RF-CMOS technology by using a proprietary protocol, which combines the new IEEE 802.11n features such as multiple-in multiple-out (MIMO) technology with other wireless technologies to provide high data rate robust real-time high definition television (HDTV) distribution within a home environment. The RF frequencies cover from 4.9 to 5.9 GHz: the industrial, scientific and medical (ISM) band. Each RF channel bandwidth is 20 MHz. The transceiver utilizes a direct up transmitter and low-IF receiver architecture. A dual-quadrature direct up conversion mixer is used that achieves better than 35 dB image rejection without any on chip calibration. The measurement shows a 6 dB typical receiver noise figure and a better than 33 dB transmitter error vector magnitude (EVM) at --3 dBm output power.
Key words: CMOS
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Received: 20 August 2015 Revised: 27 April 2012 Online: Published: 01 July 2012
Citation: |
Liang Yaping, Che Dazhi, Liang Cheng, Sun Lingling. An integrated CMOS high data rate transceiver for video applications[J]. Journal of Semiconductors, 2012, 33(7): 075005. doi: 10.1088/1674-4926/33/7/075005
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Liang Y P, Che D Z, Liang C, Sun L L. An integrated CMOS high data rate transceiver for video applications[J]. J. Semicond., 2012, 33(7): 075005. doi: 10.1088/1674-4926/33/7/075005.
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