J. Semicond. > 2013, Volume 34 > Issue 11 > 114007
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SEMICONDUCTOR DEVICES

Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate

Kai Han1, 2, , Xueli Ma2, Jinjuan Xiang2, Hong Yang2 and Wenwu Wang2

+ Author Affiliations

 Corresponding author: Han Kai, Email:hankai@ime.ac.cn

DOI: 10.1088/1674-4926/34/11/114007

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Abstract: The effects of low temperature annealing, such as post high-k dielectric deposition annealing (PDA), post metal annealing (PMA) and forming gas annealing (FGA) on the electrical characteristics of a metal-oxide-semiconductor (MOS) capacitor with a TiN metal gate and a HfO2 dielectric are systematically investigated. It can be found that the low temperature annealing can improve the capacitance-voltage hysteresis performance significantly at the cost of increasing gate leakage current. Moreover, FGA could effectively decrease the interfacial state density and oxygen vacancy density, and PDA could make the flat band positively shift which is suitable for P-type MOSs.

Key words: ALD HfO2, TiN, low temperature annealing, hysteresis



[1]
Wilk G D, Wallace R M, Anthony J M. High-k gate dielectrics:current status and materials properties considerations. J Appl Phys, 2001, 89(10):5243 doi: 10.1063/1.1361065
[2]
Zhao Y, Toyama M, Kita K, et al. Moisture-absorption-induced permittivity deterioration and surface roughness enhancement of lanthanum oxide films on silicon. Appl Phys Lett, 2006, 88(7):072904 doi: 10.1063/1.2174840
[3]
Chau R, Brask J, Datta S, et al. Application of high-k gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology. Microelectronic Eng, 2005, 80:1 doi: 10.1016/j.mee.2005.04.035
[4]
Chen T C, Peng C Y, Tseng C H, et al. Characterization of the ultrathin HfO2 and Hf-silicate films grown by atomic layer deposition. IEEE Trans Electron Devices, 2007, 54(4):759 doi: 10.1109/TED.2007.892012
[5]
Swerts J, Peys N, Nyns L, et al. Impact of precursor chemistry and process conditions on the scalability of ALD HfO2 gate dielectrics. J Electrochem Soc, 2010, 157(1):G26
[6]
Kadoshima M, Matsuki T, Miyazaki S, et al. Effective-work-function control by varying the TiN thickness in poly-Si/TiN gate electrodes for scaled high-k CMOS FETs. IEEE Electron Device Lett, 2009, 30(5):466 doi: 10.1109/LED.2009.2016585
[7]
Westlinder J, Sjöblom G, Olsson J, Variable work function in MOS capacitors utilizing nitrogen-controlled TiNx gate electrodes. Microelectron Eng, 2004, 75:389 doi: 10.1016/j.mee.2004.07.061
[8]
Mistry K, Allen C, Auth C, et al. A 45 nm logic technology with high-k + metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging. Tech Dig-Int Electron Devices Meeting, 2007:247
[9]
Chatterjee S, Kuo Y, Lu J. Thermal annealing effect on electrical properties of metal nitride gate electrodes with hafnium oxide gate dielectrics in nano-metric MOS devices. Microelectron Eng, 2008, 85(1):202 doi: 10.1016/j.mee.2007.05.041
[10]
Choi C H, Lee K L, Narayanan V. Impact of diffusionless anneal using dynamic surface anneal on the electrical properties of a high-k/metal gate stack in metal-oxide-semiconductor devices. Appl Phys Lett, 2011, 98(12):123506 doi: 10.1063/1.3570655
[11]
Perera R, Ikeda A, Hattori R, et al. Effects of post annealing on removal of defect states in silicon oxynitride films grown by oxidation of silicon substrates nitrided in inductively coupled nitrogen plasma. Thin Solid Films, 2003423:212 doi: 10.1016/S0040-6090(02)01044-1
[12]
Weinreich W, Shariq A, Seidel K, et al. Detailed leakage current analysis of metal-insulator-metal capacitors with ZrO2, ZrO2/SiO2/ZrO2, and ZrO2/Al2O3/ZrO2 as dielectric and TiN electrodes. J Vac Sci Technol B, 2013, 31:01A109
Fig. 1.  C-V characteristics for MOS capacitors undergoing different PMA conditions. (a) Samples without PDA, and (b) samples with PDA

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Fig. 2.  $V_{\rm fb}$ properties with different annealing conditions

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Fig. 3.  XPS results of Hf4f core level for samples (a) with FGA and without PDA (b) with PDA and FGA

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Fig. 4.  EOT properties with different annealing conditions

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Fig. 5.  $\Delta V_{\rm fb}$ characteristics with different annealing conditions

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Fig. 6.  Gage leakage versus applied gate bias for samples (a) without PDA and (b) with PDA

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[1]
Wilk G D, Wallace R M, Anthony J M. High-k gate dielectrics:current status and materials properties considerations. J Appl Phys, 2001, 89(10):5243 doi: 10.1063/1.1361065
[2]
Zhao Y, Toyama M, Kita K, et al. Moisture-absorption-induced permittivity deterioration and surface roughness enhancement of lanthanum oxide films on silicon. Appl Phys Lett, 2006, 88(7):072904 doi: 10.1063/1.2174840
[3]
Chau R, Brask J, Datta S, et al. Application of high-k gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology. Microelectronic Eng, 2005, 80:1 doi: 10.1016/j.mee.2005.04.035
[4]
Chen T C, Peng C Y, Tseng C H, et al. Characterization of the ultrathin HfO2 and Hf-silicate films grown by atomic layer deposition. IEEE Trans Electron Devices, 2007, 54(4):759 doi: 10.1109/TED.2007.892012
[5]
Swerts J, Peys N, Nyns L, et al. Impact of precursor chemistry and process conditions on the scalability of ALD HfO2 gate dielectrics. J Electrochem Soc, 2010, 157(1):G26
[6]
Kadoshima M, Matsuki T, Miyazaki S, et al. Effective-work-function control by varying the TiN thickness in poly-Si/TiN gate electrodes for scaled high-k CMOS FETs. IEEE Electron Device Lett, 2009, 30(5):466 doi: 10.1109/LED.2009.2016585
[7]
Westlinder J, Sjöblom G, Olsson J, Variable work function in MOS capacitors utilizing nitrogen-controlled TiNx gate electrodes. Microelectron Eng, 2004, 75:389 doi: 10.1016/j.mee.2004.07.061
[8]
Mistry K, Allen C, Auth C, et al. A 45 nm logic technology with high-k + metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging. Tech Dig-Int Electron Devices Meeting, 2007:247
[9]
Chatterjee S, Kuo Y, Lu J. Thermal annealing effect on electrical properties of metal nitride gate electrodes with hafnium oxide gate dielectrics in nano-metric MOS devices. Microelectron Eng, 2008, 85(1):202 doi: 10.1016/j.mee.2007.05.041
[10]
Choi C H, Lee K L, Narayanan V. Impact of diffusionless anneal using dynamic surface anneal on the electrical properties of a high-k/metal gate stack in metal-oxide-semiconductor devices. Appl Phys Lett, 2011, 98(12):123506 doi: 10.1063/1.3570655
[11]
Perera R, Ikeda A, Hattori R, et al. Effects of post annealing on removal of defect states in silicon oxynitride films grown by oxidation of silicon substrates nitrided in inductively coupled nitrogen plasma. Thin Solid Films, 2003423:212 doi: 10.1016/S0040-6090(02)01044-1
[12]
Weinreich W, Shariq A, Seidel K, et al. Detailed leakage current analysis of metal-insulator-metal capacitors with ZrO2, ZrO2/SiO2/ZrO2, and ZrO2/Al2O3/ZrO2 as dielectric and TiN electrodes. J Vac Sci Technol B, 2013, 31:01A109

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    Received: 29 March 2013 Revised: 14 June 2013 Online: Published: 01 November 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(11): 114007
      Kai Han, Xueli Ma, Jinjuan Xiang, Hong Yang, Wenwu Wang. Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate[J]. Journal of Semiconductors, 2013, 34(11): 114007. doi: 10.1088/1674-4926/34/11/114007 ****K Han, X L Ma, J J Xiang, H Yang, W W Wang. Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate[J]. J. Semicond., 2013, 34(11): 114007. doi: 10.1088/1674-4926/34/11/114007.
      Citation:
      Kai Han, Xueli Ma, Jinjuan Xiang, Hong Yang, Wenwu Wang. Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate[J]. Journal of Semiconductors, 2013, 34(11): 114007. doi: 10.1088/1674-4926/34/11/114007 ****
      K Han, X L Ma, J J Xiang, H Yang, W W Wang. Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate[J]. J. Semicond., 2013, 34(11): 114007. doi: 10.1088/1674-4926/34/11/114007.
      shu

      Effect of low temperature annealing on the electrical properties of an MOS capacitor with a HfO2 dielectric and a TiN metal gate

      DOI: 10.1088/1674-4926/34/11/114007
      • 1.

        Department of Physics and Electronic Science, Weifang University, Weifang 261061, China

      • 2.

        Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academyof Sciences, Beijing 100029, China

      Funds:

      Project supported by the Important National Science & Technology Specific Projects, China (No. 2009ZX02035) and the National Natural Science Foundation of China (Nos. 61176091, 50932001)

      the National Natural Science Foundation of China 61176091

      the Important National Science & Technology Specific Projects, China 2009ZX02035

      the National Natural Science Foundation of China 50932001

      More Information
      • Corresponding author: Han Kai, Email:hankai@ime.ac.cn
      • Received Date: 2013-03-29
      • Revised Date: 2013-06-14
      • Published Date: 2013-11-01

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