Engineering in-plane silicon nanowire springs for highly stretchable electronics

Zhaoguo Xue; Taige Dong; Zhimin Zhu; Yaolong Zhao; Ying Sun; Linwei Yu

doi:10.1088/1674-4926/39/1/011001

J. Semicond. > 2018, Volume 39 > Issue 1 > 011001

Special Issue on Flexible and Wearable Electronics: from Materials to Applications

Engineering in-plane silicon nanowire springs for highly stretchable electronics

Zhaoguo Xue, Taige Dong, Zhimin Zhu, Yaolong Zhao, Ying Sun and Linwei Yu

+ Author Affiliations

Corresponding author: Linwei Yu, yulinwei@nju.edu.cn

DOI: 10.1088/1674-4926/39/1/011001

Abstract: Crystalline silicon (c-Si) is unambiguously the most important semiconductor that underpins the development of modern microelectronics and optoelectronics, though the rigid and brittle nature of bulk c-Si makes it difficult to implement directly for stretchable applications. Fortunately, the one-dimensional (1D) geometry, or the line-shape, of Si nanowire (SiNW) can be engineered into elastic springs, which indicates an exciting opportunity to fabricate highly stretchable 1D c-Si channels. The implementation of such line-shape-engineering strategy demands both a tiny diameter of the SiNWs, in order to accommodate the strains under large stretching, and a precise growth location, orientation and path control to facilitate device integration. In this review, we will first introduce the recent progresses of an in-plane self-assembly growth of SiNW springs, via a new in-plane solid-liquid-solid (IPSLS) mechanism, where mono-like but elastic SiNW springs are produced by surface-running metal droplets that absorb amorphous Si thin film as precursor. Then, the critical growth control and engineering parameters, the mechanical properties of the SiNW springs and the prospects of developing c-Si based stretchable electronics, will be addressed. This efficient line-shape-engineering strategy of SiNW springs, accomplished via a low temperature batch-manufacturing, holds a strong promise to extend the legend of modern Si technology into the emerging stretchable electronic applications, where the high carrier mobility, excellent stability and established doping and passivation controls of c-Si can be well inherited.

Key words: c-Si nanowires, in-plane solid-liquid-solid, self-assembly, stretchable electronics

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Fig. 1. (Color online) Schematic illustrations for the comparison of (a) the crystal pulling of thick bulk c-Si ingot at high temperature, to (b) the self-assembly growth of Si nanowires (SiNWs) at a much lower growth temperature, with yet a new possibility to engineer the line-shape for extra flexibility and stretchability.

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Fig. 2. (Color online) Typical SEM images of the low melting point metal (indium or tin) droplet catalyzed (a) vertical VLS growth of standing silicon nanowires (SiNWs) in a gaseous feeding environment, compared to (b) the in-plane solid–liquid–solid (IPSLS) growth of lateral SiNWs that take in amorphous Si (a-Si) thin film as precursor. The upper panel illustration in (b) depicts the driving energy for the IPSLS growth, where Si atoms in a-Si have a higher Gibbs energy, with respect to crystalline Si phase. While both growth mechanisms have a solid–liquid (S–L) rear deposition interface, the front absorption interface in IPSLS growth is relatively hard, as it is also of S (a-Si)–L (liquid droplet) type, which is remarkably different from the soft gas–liquid (G–L) front interface in VLS growth. This results in a strong front-rear interface interaction during an in-plane growth, as a basis for geometry engineering of the in-plane SiNWs. Adapted from Ref. [36–38, 41].

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Fig. 3. (Color online) Fabrication procedure for the in-plane SiNWs, which involves (a) H₂ plasma treatment for catalyst droplet formation, (b) a-Si:H layer coating as precursor and (c) in-situ annealing in vacuum for in-plane growth. (d) shows the typical SEM image of the free in-plane SiNWs, while (e) summarizes the overall thermal budget for each fabrication step. Adapted from Ref. [36].

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Fig. 4. (Color online) (a)–(c) show the typical SEM images of the in-plane SiNWs, grown with different balance condition gauged by a factor of $\eta -{d_{\rm c}}/{h_{\rm a}}$ . (d) plot the interface speeds of the front absorption and the rear deposition interfaces, as a function of the Si atom concentration dissolved in the liquid catalyst droplet, with a classification of three zones for the formation of straight or bent in-plane SiNWs^{[38, 41]}.

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Fig. 5. (Color online) (a), (c)–(e) show the typical SEM images of the zigzag SiNWs, with an enlarged view of the final end of the in-plane SiNW presented in the inset of (a), where the remnant a-Si:H layer has been selectively etched off. (b) illustrates the in-plane turning twinning sequence in a Si [ $11{\bar 2} $ ]-centered stereographic projection mapping. (d) shows three snapshots of the in-plane growth of SiNWs at different time, during annealing growth upon a heating stage in SEM system. (f) presents a close SEM view of a zigzag SiNW segment, with the extracted growth direction deviation (away from the general Si <211> direction) being plotted in (e) as a function of the length of SiNW. Adapted from Ref. [ 42].

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Fig. 6. (Color online) HR-TEM characterizations of a segment of a zigzag SiNW: Fourier transform diffraction patterns of different segments for Domain A are presented in (a) and (c) [or Domain B in (e) and (g)]; (b) and (f) show the local HR-TEM lattice images of the SiNW segment at places marked by the green or red spots, respectively; (d) shows the reconstruction of the whole SiNW by adding up local HR-TEM images, with a series of parallel white dash-lines marking the locations of twin planes, and green or red arrows indicating the local growth orientation in Domain A or B^[42].

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Fig. 7. Stress-strain testing of the zigzag SiNWs spring: (a) SEM image of in-situ stress-strain testing setup with of a segment of zigzag SiNWs mounted on the tip of a nano probe and to the end of a cantilever, while (b) shows the linear elastic response^[42] .

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Fig. 8. (Color online) (a) and (b) show a comparison of the guided growth of in-plane SiNWs, with the aid of simple step edge to the drawing of straight lines or regular circles with the use of rulers and compass. The SEM images show that, while the free SiNWs are irregular, the guided SiNWs faithfully follow the straight and turning edges of SiN_x steps. (c)–(e) illustrates the implementation steps of the guided growth of SiNWs, where the step edge is provided by patterning SiN_x dielectric layer crossing the indium stripes. Adapted from Ref. [48].

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Fig. 9. (Color online) (a) shows the key dimensions of a liquid catalyst droplet in a SEM image, while (b) depicts the 4 different contact profiles during a guided growth along simple step edge. (c) plots the evolution of the surface Gibbs energy of an In droplet with four different contacting profiles at the step edge. Adapted from Ref. [48].

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Fig. 10. (Color online) (a) SEM image of an in-plane Si nanowire (SiNW) channel, led by an indium (In) droplet ahead. (b) presents the transfer properties of the devices measured at different V_DS conditions, while the hole mobility in the SiNW channel under V_DS = 1.0 V is extracted and plotted against V_GS by the pink line. (c) Optical transmission spectra of the clean SiNWs after remnant a-Si:H etching, compared to those of the reference glass substrate, with a-Si:H coating and SiNWs without remnant a-Si:H etching, while (g) shows an optical image of the transparent poly-Si channels grown on glass substrate. SEM characterizations of the self-aligned poly-Si nanowire channels along the step edge lines are shown in (d), while a series of detailed HR-TEM analysis of a single nano-channel, transferred and mounted onto a copper grid are presented in (e)–(f). Adapted from Ref. [52].

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Fig. 11. (Color online) (a)–(d) show the fabrication procedure of line-shape engineered in-plane SiNWs.

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Fig. 12. (a)–(d) show the typical SEM images of the in-plane SiNWs grown into different step edge profile. The bright and thick vertical lines in (a) are the In stripes, which provide the source catalyst droplet formation. (d) shows a particular case that a single in-plane SiNWs grow to encompass an discrete island and leave it at the end following its entry path.

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Fig. 13. (Color online) ^[54] (a) SEM image of the in-plane SiNW spring, where a segment has been successfully picked up and transferred by a tungsten nano-probe to mount on both end, for mechanical testing. (b) and (c) show the SEM images of the initial and the stretched SiNW spring, while (d) and (e) present the mechanical analysis of the strain distribution in the SiNW segment. (f) shows the I–V characteristics measured on the c-Si nano spring channels, under squeezing or stretching states. The electric contacts between the SiNW spring and probe were realized by simple amorphous carbon coating. (g) shows the simulated force-displacement relationship of the SiNW spring.

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[55]	O'Mara W, Herring R B, Hunt L P. Handbook of semiconductor silicon technology. Crest Publishing House, 2007

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Received: 06 October 2017 Revised: 01 December 2017 Online: Accepted Manuscript: 12 December 2017Published: 01 January 2018

Article Navigation > Journal of Semiconductors > 2018 > 39(1): 011001

Zhaoguo Xue, Taige Dong, Zhimin Zhu, Yaolong Zhao, Ying Sun, Linwei Yu. Engineering in-plane silicon nanowire springs for highly stretchable electronics[J]. Journal of Semiconductors, 2018, 39(1): 011001. doi: 10.1088/1674-4926/39/1/011001 ****Z G Xue, T G Dong, Z M Zhu, Y L Zhao, Y Sun, L W Yu, Engineering in-plane silicon nanowire springs for highly stretchable electronics[J]. J. Semicond., 2018, 39(1): 011001. doi: 10.1088/1674-4926/39/1/011001.

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Zhaoguo Xue, Taige Dong, Zhimin Zhu, Yaolong Zhao, Ying Sun, Linwei Yu. Engineering in-plane silicon nanowire springs for highly stretchable electronics[J]. Journal of Semiconductors, 2018, 39(1): 011001. doi: 10.1088/1674-4926/39/1/011001 ****

Z G Xue, T G Dong, Z M Zhu, Y L Zhao, Y Sun, L W Yu, Engineering in-plane silicon nanowire springs for highly stretchable electronics[J]. J. Semicond., 2018, 39(1): 011001. doi: 10.1088/1674-4926/39/1/011001.

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Engineering in-plane silicon nanowire springs for highly stretchable electronics

DOI: 10.1088/1674-4926/39/1/011001

National Laboratory of Solid State Microstructures/School of Electronic Science and Engineering/Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093, China

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Project supported by the National Basic Research 973 Program (No. 2014CB921101), the National Natural Science Foundation of China (No. 61674075), the National Key Research and Development Program of China (No. 2017YFA0205003), the Jiangsu Excellent Young Scholar Program (No. BK20160020), the Scientific and Technological Support Program in Jiangsu Province (No. BE2014147-2), the Jiangsu Shuangchuang Team's Personal Program and the Fundamental Research Funds for the Central Universities, and the China Scholarship Council and the Postgraduate Program of Jiangsu Province (No. KYZZ160052).

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Corresponding author: yulinwei@nju.edu.cn
Received Date: 2017-10-06
Revised Date: 2017-12-01
Published Date: 2018-01-01

Abstract

Abstract

Crystalline silicon (c-Si) is unambiguously the most important semiconductor that underpins the development of modern microelectronics and optoelectronics, though the rigid and brittle nature of bulk c-Si makes it difficult to implement directly for stretchable applications. Fortunately, the one-dimensional (1D) geometry, or the line-shape, of Si nanowire (SiNW) can be engineered into elastic springs, which indicates an exciting opportunity to fabricate highly stretchable 1D c-Si channels. The implementation of such line-shape-engineering strategy demands both a tiny diameter of the SiNWs, in order to accommodate the strains under large stretching, and a precise growth location, orientation and path control to facilitate device integration. In this review, we will first introduce the recent progresses of an in-plane self-assembly growth of SiNW springs, via a new in-plane solid-liquid-solid (IPSLS) mechanism, where mono-like but elastic SiNW springs are produced by surface-running metal droplets that absorb amorphous Si thin film as precursor. Then, the critical growth control and engineering parameters, the mechanical properties of the SiNW springs and the prospects of developing c-Si based stretchable electronics, will be addressed. This efficient line-shape-engineering strategy of SiNW springs, accomplished via a low temperature batch-manufacturing, holds a strong promise to extend the legend of modern Si technology into the emerging stretchable electronic applications, where the high carrier mobility, excellent stability and established doping and passivation controls of c-Si can be well inherited.
- c-Si nanowires,
- in-plane solid-liquid-solid,
- self-assembly,
- stretchable electronics

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References

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Engineering in-plane silicon nanowire springs for highly stretchable electronics

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Engineering in-plane silicon nanowire springs for highly stretchable electronics

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Engineering in-plane silicon nanowire springs for highly stretchable electronics

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