A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure

Chenxia Wang; Jie Wei; Diao Fan; Yang Yang; Xiaorong Luo

doi:10.1088/1674-4926/41/10/102402

J. Semicond. > 2020, Volume 41 > Issue 10 > 102402

ARTICLES

A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure

Chenxia Wang, Jie Wei, Diao Fan, Yang Yang and Xiaorong Luo

+ Author Affiliations

Corresponding author: Jie Wei, Email: weijieuestc@uestc.edu.cn; Xiaorong Luo, xrluo@uestc.edu.cn

DOI: 10.1088/1674-4926/41/10/102402

Abstract: A novel 600 V snapback-free high-speed silicon-on-insulator lateral insulated gate bipolar transistor is proposed and investigated by simulation. The proposed device features an embedded NPN structure at the anode side, and double trenches together with an N-type carrier storage (N-CS) layer at the cathode side, named DT-NPN LIGBT. The NPN structure not only acts as an electron barrier to eliminate the snapback effect in the on-state within a smaller cell pitch but also provides an extra electron extracting path during the turn-off stage to decrease the turnoff loss (E_off). The double cathode trenches and N-CS layer hinder the hole from being extracted by the cathode quickly. They then enhance carrier storing effect and lead to a reduced on-state voltage drop (V_on). The latch-up immunity is improved by the double cathode trenches. Hence, the DT-NPN LIGBT obtains a superior tradeoff between the V_on and E_off. Additionally, the DT-NPN LIGBT exhibits an improved blocking capability and weak dependence of breakdown voltage (BV) on the P⁺ anode doping concentration because the NPN structure suppresses triggering the PNP transistor. The proposed LIGBT reduces the E_off by 55% at the same V_on, and improves the BV by 7.3% compared to the conventional LIGBT.

Key words: snapback-free, fast switching, SOI LIGBT, trench gate, E_off

1. Introduction

Lateral insulated gate bipolar transistor (LIGBT) on silicon-on-insulator (SOI) is widely applied in power integrated circuits, due to its low on-state voltage, high input impedance and high current capability^[1-8]. However, LIGBTs exist the contradiction relationship between the turn-off loss (E_off) and the on-state voltage (V_on). The lateral injection-enhanced gate transistor (LIEGT) is proposed to improve the current capability and achieve a lower V_on^[9]. The U-shaped channel LIGBT with dual trenches is adopted to enhance carrier stored effect and obtain a low V_on^{[10, 11]}. However, the lower V_on usually results in a higher E_off. To reduce the E_off, the shorted-anode (SA) LIGBT provides an additional electron extracting path by introducing the N⁺ anode region, but it brings a snapback effect^[12]. The separated shorted anode (SSA) LIGBT needs a large cell pitch to solve this problem by increasing L_s (the length between N-buffer and N⁺ anode), leading to a low area efficiency^[13]. For the segmented (SEG) anode LIGBT, a very large geometry ratio of the P⁺ and N⁺ anode is needed to eliminate the snapback effect^[14]. The multi-segment anode (MSA) adopts multi-segmented P⁺ anode and P-buried layers in anode regions to increase the anode distribution resistance and thus eliminates the snapback effect, while its improvement on E_off is limited^[15]. The STA LIGBT suppresses the snapback effect by forming segmented deep trenches between P⁺ anode and N⁺ anode, but the path between the trenches should be small enough to eliminate the snapback effect, which will limit the improvement on E_off on the contrary^[16].

In this paper, a novel DT-NPN LIGBT featuring an NPN structure, double trenches and an N-CS layer is proposed to achieve a better tradeoff between the V_on and E_off. The proposed device eliminates the snapback effect within a small device dimension by adjusting the parameters of the embedded NPN structure. It achieves a low V_on due to the carrier storing effect enhanced by the double cathode trenches and N-CS layer. Meanwhile, the double cathode trenches enhance the latch-up ruggedness. This paper is implemented by TCAD Sentaurus Device simulation tools^[17], which includes the models of high field saturation mobility, Philips unified mobility, Auger recombination, Enormal mobility, Shockley–Read–Hall recombination, and Lackner avalanche generation.

2. Device structure and mechanism

Fig. 1 shows the schematic cross-sectional views of the proposed DT-NPN LIGBT, double trench segment anode LIGBT (named SEG LTIGBT), and double trench separated shorted anode LIGBT (named SSA LTIGBT). The proposed LIGBT features an NPN structure at the anode side, consisting of N⁺ anode, P-well and N-buffer. Moreover, there are cathode trench gate (CTG), cathode blocking trench (CBT) and an N-type carrier storage (N-CS) layer at the cathode side for the three devices mentioned above. The implantations for N-CS and N-buffer layer are implemented at the same time to achieve better performance without more cost. The CTG and CBT are carried out within the same process step. The key parameters used in simulations for the three devices are shown in Table 1. N_p and D_p are the doping concentration and depth of the P-well region at the anode side for DT–NPN LIGBT, as shown in Fig. 2. The carriers’ lifetime is 1 μs for all devices.

Figure 1. (Color online) Schematic cross-sectional views of (a) DT-NPN LIGBT, (b) SEG LTIGBT, and (c) SSA LTIGBT.

DownLoad: Full-Size Img PowerPoint

Table 1. Key parameters for LIGBTs.

Parameter	DT-NPN	SEG	SSA
N-drift length, L_d (μm)	54	54	54
SOI layer thickness, T_s (μm)	25	25	25
Buried oxide thickness, t_box (μm)	3	3	3
N-drift doping, N_d (10¹⁴ cm⁻³)	2	2	2
N-buffer doping, N_buffer (10¹⁶ cm⁻³)	6	2	6
N-CS doping, N_cs (10¹⁶ cm⁻³)	6	6	6
P-body doping, N_p-body (10¹⁷ cm⁻³)	1	1	1
Gate oxide thickness (μm)	0.1	0.1	0.1
Trench depth (μm)	4	4	4

DownLoad: CSV | Show Table

Figure 2. (Color online) Equivalent circuit of the DT-NPN LIGBT. R_p-body and R_p are distributed resistance at the cathode and anode region, respectively.

DownLoad: Full-Size Img PowerPoint

Fig. 2 shows the equivalent circuit of the DT-NPN LIGBT. At the initial forward conduction stage with CTG turned on, the device operates in unipolar mode and the electron current is dominant. The P-well acts as an electrons barrier and hinders the electron from flowing through the N⁺ anode directly. As the anode voltage increases, the P⁺ anode/N-buffer junction turns on and the LIGBT quickly transforms from unipolar mode to bipolar mode without snapback effect. Meanwhile, the double cathode trenches and N-CS layer prevent holes from flowing to the cathode directly. Then, the carrier storing effect is enhanced in the N-drift and the V_on decreases sharply. During the turn-off stage, the shallow P-well is fully depleted and the NPN structure is activated to provide a low-resistance path to extract the electrons rapidly. Hence, the turn-off time and the E_off are decreased. The vertical channel and the hole bypass along the CTG and CBT respectively could decrease the distributed resistance at the cathode side, and then the proposed device enhances the immunity of latch-up effect and widens the safe operation area (SOA).

3. Results and discussion

Fig. 3(a) shows the dependences of BV and V_on on the P⁺ anode doping concentration (N_A). For low N_A, the V_on of proposed DT-NPN LIGBT is smaller than that of the conventional (Conv.) LIEGT in Ref. [9] because the N-CS layer is dominant to increase the carrier density and decrease V_on. It is contrary for high N_A value, because the N⁺ anode results in the hole injection of the proposed device much smaller than that of Conv. LIEGT. Obviously, the BV of Conv. LIEGT decreases dramatically with the increasing N_A, while it almost remains stable for the DT-NPN LIGBT for different N_A. For N_A = 1 × 10¹⁸ cm^–3, the BV = 614 V of the proposed LIGBT is 7.3% higher than BV = 572 V of Conv. LIEGT. Fig. 3(b) compares the current component at breakdown. The Conv. LIEGT exhibits an open-base P–N–P transistor breakdown mechanism because the leakage current increases distinctly with the increasing N_A and the hole leakage current is higher than electron leakage current. In contrast, the DT-NPN LIGBT behaves MOS-like blocking mechanism as the electron leakage current is dominated and almost irrelevant to N_A. Because the embedded NPN structure suppresses the hole injection of the P⁺ anode/N-buffer junction. Particularly, the DT-NPN LIGBT relieves the conflict demand of N_A on high BV and low V_on, and then V_on and BV can be designed separately.

Figure 3. (Color online) (a) Dependences of the BV and V_on on N_A. (b) Breakdown characteristics. Here I_e and I_h represent the electron current and hole current, respectively.

DownLoad: Full-Size Img PowerPoint

Fig. 4 illustrates the snapback characteristics of different LIGBTs with the same N_A. The proposed LIGBT eliminates the snapback effect by the optimizing the N_p and D_p, without increasing length in the x-direction. However, the SSA LTIGBT still shows a little ΔV_SB even the length L_s = 40 μm. The SEG LTIGBT also has a snapback effect, even when the width W_P/ W_N of P⁺/ N⁺ anode reaches 79/1 μm. Fig. 5 shows the total current density distribution and the flowlines extracted from Fig. 4. In Fig. 5(a), one current flowline derives from the P⁺ anode for the DT-NPN LIGBT, which means the P⁺ anode/N-buffer junction is turned on and the device changes from unipolar mode to bipolar mode at a smaller V_A. Owing to the barrier effect induced by the P-well, the proposed LIGBT shows snapback-free effect with compact dimension in x-direction. However, the SSA and SEG LTIGBTs require large extra dimensions above 40 μm in x-direction and 79 μm in z-direction respectively to reduce the ΔV_SB, because all the current flowlines derive from the N⁺ anode and both devices are still in unipolar mode, as shown in Figs. 5(b) and 5(c).

Figure 4. (Color online) Snapback characteristics for different devices. W_p/W_n is the width of P⁺/N⁺ anode. ΔV_SB is snapback voltage.

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Figure 5. (Color online) Total current density distribution and the flowlines for (a) the proposed LIGBT (at point A in Fig. 4), (b) the SEG LTIGBT (at point C in Fig. 4), and (c) the SSA LTIGBT (at point B in Fig. 4).

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Fig. 6(a) shows the influences of N_p and D_p on the forward conduction characteristics. With the increasing N_p and D_p, the snapback effect is weakened and eventually eliminated, because larger N_p and D_p values increase the electron barrier height and width at P-well/N-buffer junction to hinder N⁺ anode from extracting electrons, as shown in Fig. 6(b). Therefore, the increasing N_p and D_p are beneficial to decrease the ΔV_SB and V_on, but increase the E_off as shown in Fig. 6(c). The snapback effect is eliminated with N_p = 1.5 × 10¹⁶ cm^–3 and D_p = 1 μm, or N_p = 3 × 10¹⁶ cm^–3 and D_p = 0.5 μm.

Figure 6. (Color online) Influences of the N_p and D_p on (a) forward conduction characteristics at V_G = 15 V, (b) conduction energy band distribution of P-well/N-buffer junction in the y-direction and (c) ΔV_SB, V_on and E_off. qψ_H and W_H are the height and width of electron barrier. To entirely suppress the snapback by optimizing the N_p and D_p, the qψ_H is about 0.75 eV.

DownLoad: Full-Size Img PowerPoint

Fig. 7 compares the forward conduction characteristics of four LIGBTs with different cathode structures. The proposed LIGBT shows the lowest V_on of 1.25 V because both the double trenches and the N-CS layer increase the hole density at the cathode side and enhance conduction modulation effect in the drift region. The V_on of the LIGBT with Type1 cathode structure increases to 1.37 V, owing to the deletion of N-CS layer^[18-20]. The LIGBT with Type2-cathode structure, without the CBT and N-CS layer, decreases the hole density at the cathode side and then V_on increases to 1.54 V. The LIGBT with a planar gate reaches the highest V_on of 1.94 V. The inserted hole density distribution verifies the current modulation effect induced by the N-CS, CBT and CTG, respectively.

Figure 7. (Color online) Forward conduction characteristics. Insets: hole density distribution for different LIGBTs at the cathode side (@ y = 4.1 μm) and schematic cross-sectional views of four different cathode structures for LIGBTs with the same anode structure as that of the proposed DT-NPN LIGBT.

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Fig. 8 shows the switching characteristics of different LIGBTs at the same V_on without snapback effect. The devices start turning off at t₁ = 20 μs. The proposed LIGBT achieves the fastest switching speed of 54 ns because the embedded NPN structure provides a larger width of extra electron extraction path than the SEG LTIGBT and MSA LIGBT. However, the Conv. LIEGT exhibits the longest tail current and higher E_off, because its excess carriers stored in the drift region mainly depends on recombination to disappear without extra electron extraction path. Fig. 8(b) shows the electron concentration distributions of the proposed LIGBT and SEG LTIGBT from t₁ to t₅ period labeled in Fig. 8(a). It is quite obvious that the electron density of the proposed LIGBT is lower than that of the SEG LTIGBT at the same time, owing to the activated NPN with a wider rapidly electron extracting path. As shown in Fig. 8(c), a large number of current flowlines flow through the embedded NPN structure during the turn-off period of the proposed LIGBT.

Figure 8. (Color online) Switching characteristics: (a) switching waves, the inset shows the simulation circuit with R_G = 10 Ω and L_S = 10 nH, (b) carrier distribution at different time, (c) current flowlines through the embedded NPN structure at t₃.

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Fig. 9 shows the I_A–V_A characteristics for the DT-NPN LIGBT and MSA LIGBT at V_G = 10 V and 15 V. In the on-state, the cathode distributed resistance R_p-body should be small enough to avoid triggering the parasitic NPN transistor (N⁺ cathode/P-body/N-CS) at the cathode side. For the proposed LIGBT, the CBT and CTG force the hole current flowing vertically, which is conducive to decrease R_p-body. In contrast, the hole current inevitably flows under the N⁺ cathode and easily triggers the latch-up effect, even a P-buried layer is formed below the N⁺ cathode. Therefore, the DT-NPN LIGBT exhibits much better latch-up ruggedness than MSA LIGBT.

Figure 9. (Color online) I_A–V_A characteristics for the DT-NPN and MSA LIGBT.

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Fig. 10 shows the E_off–V_on tradeoff of different LIGBTs at the load current density of 100 A/cm². Due to the contribution of double trenches at cathode side and embedded NPN structure at the anode side, the proposed IGBT shows better tradeoff than other counterparts. The E_off value of the proposed LIGBT is 55% lower than that of Conv. LIEGT at the same V_on of 1.22 V. Meanwhile, the proposed LIGBT decreases the V_on by 4.8%, 7.4% and 38.6% compared with SEG LTIGBT, Conv. LIEGT, and MSA LIGBT at the same E_off, respectively.

Figure 10. (Color online) E_off–V_on tradeoff of different LIGBTs.

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Fig. 11 depicts the key fabrication steps of the proposed LIGBT. In Fig. 11(a), N-CS/N-buffer implantations are implemented at the same time. To ensure the reliability of double trenches and eliminate the snapback effect, the P-body/P-well implantations are implemented under different doses and masks in Fig. 11(b). The double trenches could be formed at the same time, as shown in Fig. 11(c). All the steps can be implemented by the feasible and mature trench BCD technology.

Figure 11. (Color online) Key fabrication steps. (a) N-buffer and N-CS-layer implantations. (b) P-well and P-body implantations. (c) Trenches etching, oxidation, and poly-silicon deposition. (d) Implantations for N⁺/P⁺ regions and formation of metal contacts.

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4. Conclusion

A novel 600 V class DT-NPN LIGBT is proposed and investigated. Due to the electron barrier of P-well, the proposed LIGBT entirely avoids the snapback effect within small cell pitch, while it delivers an electron extracting path during the turn-off stage to decrease E_off. The double cathode trenches and N-CS layer enhance the carrier storing effect to achieve a lower V_on. Therefore, the proposed LIGBT acquires superior tradeoff characteristic between V_on and E_off compared with the Conv. LIEGT, MSA LIGBT and SSA LTIGBT. The proposed LIGBT reduces the E_off by 55% compared to the Conv. LIEGT at the same V_on, and decreases the V_on by 38.6% compared to the MSA LIGBT at the same E_off. Moreover, the DT-NPN LIGBT improves the BV by 7.3% and relieves the dependence of the BV on the N_A. In addition, the DT-NPN LIGBT enhances the latch-up ruggedness, because the double trenches form vertical channels and provide a hole by-pass path to reduce the cathode distributed resistance.

Acknowledgments

This work is supported by Postdoctoral Innovative Talent Support Program under Grant BX20190059, the China Postdoctoral Science Foundation under Grant 2019M660235, the Sichuan Science and Technology Program under Project 2018JY0555 and the Science and Technology on Analog Integrated Circuit Laboratory under Project 6142802180509.

References

[1]	Iwamuro N, Laska T. IGBT history, state-of-the-art, and future prospects. IEEE Trans Electron Devices, 2017, 64, 741 doi: 10.1109/TED.2017.2654599
[2]	Disney D, Letavic T, Trajkovic T, et al. High-voltage integrated circuits: History, state of the art, and future prospects. IEEE Trans Electron Devices, 2017, 64, 659 doi: 10.1109/TED.2016.2631125
[3]	Hu H, Huang H M, Chen X B. A novel double-RESURF SOI lateral TIGBT with self-biased nMOS for improved V_CE(sat)–E_off tradeoff relationship. IEEE Trans Electron Devices, 2019, 66, 814 doi: 10.1109/TED.2018.2878474
[4]	Green D W, Sweet M, Vershinin K V, et al. Performance analysis of the segment npn anode LIGBT. IEEE Trans Electron Devices, 2005, 52, 2482 doi: 10.1109/TED.2005.857168
[5]	Chen W S, Zhang B, Li Z J. Area-efficient fast-speed lateral IGBT with a 3-D n-region-controlled anode. IEEE Electron Device Lett, 2010, 31, 467 doi: 10.1109/LED.2010.2043638
[6]	Sun W F, Zhu J, Yang Z, et al. A composite structure named self-adjusted conductivity modulation SOI-LIGBT with low on-state voltage. 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD), 2017, 85
[7]	Duan B X, Sun L C, Yang Y T. Analysis of the novel snapback-free LIGBT with fast-switching and improved latch-up immunity by TCAD simulation. IEEE Electron Device Lett, 2019, 40, 63 doi: 10.1109/LED.2018.2881289
[8]	Luo X R, Zhao Z Y, Huang L H, et al. A snapback-free fast-switching SOI LIGBT with an embedded self-biased n-MOS. IEEE Trans Electron Devices, 2018, 65, 3572 doi: 10.1109/TED.2018.2842092
[9]	Matsudai T, Kitagawa M, Nakagawa A. A trench-gate injection enhanced lateral IEGT on SOI. Proceedings of International Symposium on Power Semiconductor Devices and IC's, 1995, 141
[10]	Zhang L, Zhu J, Sun W F, et al. A U-shaped channel SOI-LIGBT with dual trenches. IEEE Trans Electron Devices, 2017, 64, 2587 doi: 10.1109/TED.2017.2696258
[11]	Zhang L, Zhu J, Sun W F, et al. Comparison of short-circuit characteristics of trench gate and planar gate U-shaped channel SOI-LIGBTs. Solid-State Electron, 2017, 135, 24 doi: 10.1016/j.sse.2017.06.009
[12]	Simpson M R. Analysis of negative differential resistance in the I–V characteristics of shorted-anode LIGBT's. IEEE Trans Electron Devices, 1991, 38, 1633 doi: 10.1109/16.85160
[13]	Chul J H, Byeon D S, Oh J K, et al. A fast-switching SOI SA-LIGBT without NDR region. 12th International Symposium on Power Semiconductor Devices & ICs, 2000, 149
[14]	Sin J K O, Mukherjee S. Lateral insulated-gate bipolar transistor (LIGBT) with a segmented anode structure. IEEE Electron Device Lett, 1991, 12, 45 doi: 10.1109/55.75699
[15]	Zhou K, Sun T, Liu Q, et al. A snapback-free shorted-anode SOI LIGHT with multi-segment anode. 2017 29th International Symposium on Power Semiconductor Devices and IC's, 2017, 315
[16]	Zhang L, Zhu J, Sun W F, et al. A high current density SOI-LIGBT with segmented trenches in the anode region for suppressing negative differential resistance regime. 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD), 2015, 49
[17]	TCAD Sentaurus device manual. Synopsys, Inc., Mountain View, CA, USA, 2013
[18]	Takahashi H, Haruguchi H, Hagino H, et al. Carrier stored trench-gate bipolar transistor (CSTBT) – A novel power device for high voltage application. 8th International Symposium on Power Semiconductor Devices and ICs, 1996, 349
[19]	He Y T, Qiao M, Zhang B. Ultralow turnoff loss dual-gate SOI LIGBT with trench gate barrier and carrier stored layer. Chin Phys B, 2016, 25, 127304 doi: 10.1088/1674-1056/25/12/127304
[20]	Sun T, Luo X R, Wei J, et al. A carrier stored SOI LIGBT with ultralow ON-state voltage and high current capability. IEEE Trans Electron Devices, 2018, 65, 3365 doi: 10.1109/TED.2018.2848468
[21]	Luo X R, Yang Y, Sun T, et al. A snapback-free and low-loss shorted-anode SOI LIGBT with self-adaptive resistance. IEEE Trans Electron Devices, 2019, 66, 1390 doi: 10.1109/TED.2019.2892068

Fig. 1. (Color online) Schematic cross-sectional views of (a) DT-NPN LIGBT, (b) SEG LTIGBT, and (c) SSA LTIGBT.

DownLoad: Full-Size Img PowerPoint

Fig. 2. (Color online) Equivalent circuit of the DT-NPN LIGBT. R_p-body and R_p are distributed resistance at the cathode and anode region, respectively.

DownLoad: Full-Size Img PowerPoint

Fig. 3. (Color online) (a) Dependences of the BV and V_on on N_A. (b) Breakdown characteristics. Here I_e and I_h represent the electron current and hole current, respectively.

DownLoad: Full-Size Img PowerPoint

Fig. 4. (Color online) Snapback characteristics for different devices. W_p/W_n is the width of P⁺/N⁺ anode. ΔV_SB is snapback voltage.

DownLoad: Full-Size Img PowerPoint

Fig. 5. (Color online) Total current density distribution and the flowlines for (a) the proposed LIGBT (at point A in Fig. 4), (b) the SEG LTIGBT (at point C in Fig. 4), and (c) the SSA LTIGBT (at point B in Fig. 4).

DownLoad: Full-Size Img PowerPoint

Fig. 6. (Color online) Influences of the N_p and D_p on (a) forward conduction characteristics at V_G = 15 V, (b) conduction energy band distribution of P-well/N-buffer junction in the y-direction and (c) ΔV_SB, V_on and E_off. qψ_H and W_H are the height and width of electron barrier. To entirely suppress the snapback by optimizing the N_p and D_p, the qψ_H is about 0.75 eV.

DownLoad: Full-Size Img PowerPoint

Fig. 7. (Color online) Forward conduction characteristics. Insets: hole density distribution for different LIGBTs at the cathode side (@ y = 4.1 μm) and schematic cross-sectional views of four different cathode structures for LIGBTs with the same anode structure as that of the proposed DT-NPN LIGBT.

DownLoad: Full-Size Img PowerPoint

Fig. 8. (Color online) Switching characteristics: (a) switching waves, the inset shows the simulation circuit with R_G = 10 Ω and L_S = 10 nH, (b) carrier distribution at different time, (c) current flowlines through the embedded NPN structure at t₃.

DownLoad: Full-Size Img PowerPoint

Fig. 9. (Color online) I_A–V_A characteristics for the DT-NPN and MSA LIGBT.

DownLoad: Full-Size Img PowerPoint

Fig. 10. (Color online) E_off–V_on tradeoff of different LIGBTs.

DownLoad: Full-Size Img PowerPoint

Fig. 11. (Color online) Key fabrication steps. (a) N-buffer and N-CS-layer implantations. (b) P-well and P-body implantations. (c) Trenches etching, oxidation, and poly-silicon deposition. (d) Implantations for N⁺/P⁺ regions and formation of metal contacts.

DownLoad: Full-Size Img PowerPoint

Table 1. Key parameters for LIGBTs.

Parameter	DT-NPN	SEG	SSA
N-drift length, L_d (μm)	54	54	54
SOI layer thickness, T_s (μm)	25	25	25
Buried oxide thickness, t_box (μm)	3	3	3
N-drift doping, N_d (10¹⁴ cm⁻³)	2	2	2
N-buffer doping, N_buffer (10¹⁶ cm⁻³)	6	2	6
N-CS doping, N_cs (10¹⁶ cm⁻³)	6	6	6
P-body doping, N_p-body (10¹⁷ cm⁻³)	1	1	1
Gate oxide thickness (μm)	0.1	0.1	0.1
Trench depth (μm)	4	4	4

DownLoad: CSV

[1]	Iwamuro N, Laska T. IGBT history, state-of-the-art, and future prospects. IEEE Trans Electron Devices, 2017, 64, 741 doi: 10.1109/TED.2017.2654599
[2]	Disney D, Letavic T, Trajkovic T, et al. High-voltage integrated circuits: History, state of the art, and future prospects. IEEE Trans Electron Devices, 2017, 64, 659 doi: 10.1109/TED.2016.2631125
[3]	Hu H, Huang H M, Chen X B. A novel double-RESURF SOI lateral TIGBT with self-biased nMOS for improved V_CE(sat)–E_off tradeoff relationship. IEEE Trans Electron Devices, 2019, 66, 814 doi: 10.1109/TED.2018.2878474
[4]	Green D W, Sweet M, Vershinin K V, et al. Performance analysis of the segment npn anode LIGBT. IEEE Trans Electron Devices, 2005, 52, 2482 doi: 10.1109/TED.2005.857168
[5]	Chen W S, Zhang B, Li Z J. Area-efficient fast-speed lateral IGBT with a 3-D n-region-controlled anode. IEEE Electron Device Lett, 2010, 31, 467 doi: 10.1109/LED.2010.2043638
[6]	Sun W F, Zhu J, Yang Z, et al. A composite structure named self-adjusted conductivity modulation SOI-LIGBT with low on-state voltage. 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD), 2017, 85
[7]	Duan B X, Sun L C, Yang Y T. Analysis of the novel snapback-free LIGBT with fast-switching and improved latch-up immunity by TCAD simulation. IEEE Electron Device Lett, 2019, 40, 63 doi: 10.1109/LED.2018.2881289
[8]	Luo X R, Zhao Z Y, Huang L H, et al. A snapback-free fast-switching SOI LIGBT with an embedded self-biased n-MOS. IEEE Trans Electron Devices, 2018, 65, 3572 doi: 10.1109/TED.2018.2842092
[9]	Matsudai T, Kitagawa M, Nakagawa A. A trench-gate injection enhanced lateral IEGT on SOI. Proceedings of International Symposium on Power Semiconductor Devices and IC's, 1995, 141
[10]	Zhang L, Zhu J, Sun W F, et al. A U-shaped channel SOI-LIGBT with dual trenches. IEEE Trans Electron Devices, 2017, 64, 2587 doi: 10.1109/TED.2017.2696258
[11]	Zhang L, Zhu J, Sun W F, et al. Comparison of short-circuit characteristics of trench gate and planar gate U-shaped channel SOI-LIGBTs. Solid-State Electron, 2017, 135, 24 doi: 10.1016/j.sse.2017.06.009
[12]	Simpson M R. Analysis of negative differential resistance in the I–V characteristics of shorted-anode LIGBT's. IEEE Trans Electron Devices, 1991, 38, 1633 doi: 10.1109/16.85160
[13]	Chul J H, Byeon D S, Oh J K, et al. A fast-switching SOI SA-LIGBT without NDR region. 12th International Symposium on Power Semiconductor Devices & ICs, 2000, 149
[14]	Sin J K O, Mukherjee S. Lateral insulated-gate bipolar transistor (LIGBT) with a segmented anode structure. IEEE Electron Device Lett, 1991, 12, 45 doi: 10.1109/55.75699
[15]	Zhou K, Sun T, Liu Q, et al. A snapback-free shorted-anode SOI LIGHT with multi-segment anode. 2017 29th International Symposium on Power Semiconductor Devices and IC's, 2017, 315
[16]	Zhang L, Zhu J, Sun W F, et al. A high current density SOI-LIGBT with segmented trenches in the anode region for suppressing negative differential resistance regime. 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD), 2015, 49
[17]	TCAD Sentaurus device manual. Synopsys, Inc., Mountain View, CA, USA, 2013
[18]	Takahashi H, Haruguchi H, Hagino H, et al. Carrier stored trench-gate bipolar transistor (CSTBT) – A novel power device for high voltage application. 8th International Symposium on Power Semiconductor Devices and ICs, 1996, 349
[19]	He Y T, Qiao M, Zhang B. Ultralow turnoff loss dual-gate SOI LIGBT with trench gate barrier and carrier stored layer. Chin Phys B, 2016, 25, 127304 doi: 10.1088/1674-1056/25/12/127304
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Wang, Y., Zhang, A., Jian, P. et al. A snapback-free and fast-switching planar-gate SOI LIGBT with three electron extracting channels. IEICE Electronics Express, 2022, 19(16) doi:10.1587/elex.19.20220288

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Chenxia Wang, Jie Wei, Diao Fan, Yang Yang, Xiaorong Luo. A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure[J]. Journal of Semiconductors, 2020, 41(10): 102402. doi: 10.1088/1674-4926/41/10/102402

C X Wang, J Wei, D Fan, Y Yang, X R Luo, A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure[J]. J. Semicond., 2020, 41(10): 102402. doi: 10.1088/1674-4926/41/10/102402.

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Received: 02 January 2020 Revised: 04 May 2020 Online: Accepted Manuscript: 23 June 2020Uncorrected proof: 24 June 2020Published: 01 October 2020

Article Navigation > Journal of Semiconductors > 2020 > 41(10): 102402

Chenxia Wang, Jie Wei, Diao Fan, Yang Yang, Xiaorong Luo. A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure[J]. Journal of Semiconductors, 2020, 41(10): 102402. doi: 10.1088/1674-4926/41/10/102402 ****C X Wang, J Wei, D Fan, Y Yang, X R Luo, A snapback-free and high-speed SOI LIGBT with double trenches and embedded fully NPN structure[J]. J. Semicond., 2020, 41(10): 102402. doi: 10.1088/1674-4926/41/10/102402.

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