2.5Gb/s Monolithic IC of Clock Recovery,Data Decision，and 1∶4 Demultiplexer

Chen Yingmei , Wang Zhigong , Xiong Mingzhen and and Zhang Li

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Key words: optical transmission systems, clock recovery circuits, data decision, 1∶4 demultiplexer, charge pump phase-locked loops

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Received: 18 August 2015 Revised: Online: Published: 01 August 2005

Article Navigation > Journal of Semiconductors > 2005 > 26(8): 1532-1536

Chen Yingmei, Wang Zhigong, Xiong Mingzhen, and Zhang Li. 2.5Gb/s Monolithic IC of Clock Recovery,Data Decision，and 1∶4 Demultiplexer[J]. 半导体学报(英文版), 2005, 26(8): 1532-1536.

Citation:

Chen Yingmei, Wang Zhigong, Xiong Mingzhen, and Zhang Li. 2.5Gb/s Monolithic IC of Clock Recovery,Data Decision，and 1∶4 Demultiplexer[J]. 半导体学报(英文版), 2005, 26(8): 1532-1536.

Chen Yingmei, Wang Zhigong, Xiong Mingzhen, and Zhang Li. 2.5Gb/s Monolithic IC of Clock Recovery,Data Decision，and 1∶4 Demultiplexer[J]. 半导体学报(英文版), 2005, 26(8): 1532-1536.

Citation:

Chen Yingmei, Wang Zhigong, Xiong Mingzhen, and Zhang Li. 2.5Gb/s Monolithic IC of Clock Recovery,Data Decision，and 1∶4 Demultiplexer[J]. 半导体学报(英文版), 2005, 26(8): 1532-1536.

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