| Citation: |
Li Xiaoming, Zhuang Yiqi, Zhang Li, Xin Weiping. A Double High-Voltage p-LDMOS and Its Compatible Process for PDP Scan-Driver ICs[J]. Journal of Semiconductors, 2008, 29(9): 1758-1763.
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Li X M, Zhuang Y Q, Zhang L, Xin W P. A Double High-Voltage p-LDMOS and Its Compatible Process for PDP Scan-Driver ICs[J]. J. Semicond., 2008, 29(9): 1758.
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A Double High-Voltage p-LDMOS and Its Compatible Process for PDP Scan-Driver ICs
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Abstract
A high-voltage p-LDMOS(HV-pMOS) with field-oxide as gate dielectric and a RESURF drain drift region to undertake high gate-source voltage and drain-source voltage for the scan driver chip of plasma display panels (PDP) is purposed based on the epitaxial bipolar-CMOS-DMOS (BCD) process.The key considerations and parameters of the design are discussed:the thickness of gate dielectrics is 1mm and the area of the device is 80μm ×80μm.Only 18 photoetching steps are needed in the developed process,which is compatible with standard CMOS,bipolar,and VDMOS devices.The breakdown voltage of the HV-pMOS in the process control module (PCM) is more than 200V.The results are favorable for 170V PDP scan driver chips,which contribute to the competitive cost efficiency.-
Keywords:
- PDP,
- HV-PMOS,
- BCD process,
- thick gate-oxide,
- cost-effective
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References
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Proportional views
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