Chin. J. Semicond. > 2002, Volume 23 > Issue 9 > 977-982

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Abstract: The ANSYS software is employed to analyze the inner die crack of vfBGA.A suitable 3D model and the minimum stress causing die crack are achieved by modeling and estimating.The crucial cause of inner die crack is predicted and found after the simulation of the test process.It is the great stress induced by the abnormal contact between the testing equipment and vfBGA unit that causes the inner die crack.

Key words: finite element analysisdie crackvfBGAANSYS

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    Received: 25 November 2001 Revised: Online: Published: 01 September 2002

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      PANG En-wen, LIN Jing, YU Fang, ZONG Xiang-fu. Inner Die Crack Simulation of vfBGA[J]. Journal of Semiconductors, 2002, 23(9): 977-982. ****PANG En-wen, LIN Jing, YU Fang, ZONG Xiang-fu. 2002: Inner Die Crack Simulation of vfBGA. Journal of Semiconductors, 23(9): 977-982.
      Citation:
      PANG En-wen, LIN Jing, YU Fang, ZONG Xiang-fu. Inner Die Crack Simulation of vfBGA[J]. Journal of Semiconductors, 2002, 23(9): 977-982. ****
      PANG En-wen, LIN Jing, YU Fang, ZONG Xiang-fu. 2002: Inner Die Crack Simulation of vfBGA. Journal of Semiconductors, 23(9): 977-982.

      Inner Die Crack Simulation of vfBGA

      • Received Date: 2001-11-25
        Available Online: 2023-03-15
      • Published Date: 2002-09-01

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