A high-speed power detector MMIC for E-band communication

    Corresponding author: Jian Zhang, zj@mail.sim.ac.cn
  • 1. Key Laboratory of Terahertz Solid-State Technology, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
  • 2. University of Chinese Academy of Sciences, Beijing 100049, China

Key words: pHEMTpower detectorhigh-speedE-band

Abstract: An E-band high speed power detector MMIC using 0.1 μm pHEMT technology has been designed, manufactured and experimentally characterized. By employing a 4-way quadrature structure for phase cancellation, the first, second and third harmonics can be suppressed and the ripple at the output is minimized. Compared to conventional topology with a low pass filter, a short response time and high speed performance of demodulation can be reached. Simulated results indicate that the detector is capable of demodulating an on-off keying signal at a data rate up to 5 Gbps. The fabricated chip occupies 1×1.5 mm2 and the on-wafer measurement shows a return loss of less than -15 dB, responsivity better than 700 mV/mW and dynamic range of more than 25 dB over 70 to 90 GHz.

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1.   Introduction
  • Power detector (PD) is widely used in communication systems to demodulate amplitude-shift keying (ASK) or on-off keying (OOK) signals[1, 2]. However, as the data rate keeps increasing, designing a power detector capable of demodulating an ASK or OOK signal becomes difficult. Theoretical analysis indicates the response time of the power detectors should be much shorter than 100 ps when the signal data rate is higher than 10 Gbps[3]. Normally, a low pass filter was used at the output in order to filter out high order harmonic at the cost of response of time, which leads to decreased demodulation speed[4-12].

    In this letter, an approach circumventing the necessity of LPF is elucidated. By employing a 4-way quadrature structure for phase cancellation the first, second and third harmonic of the input radio frequency (RF) signal can be suppressed and the ripple at the output is minimized, thus, the output LPF can be saved. Simulated results show that the proposed detector is capable of demodulating multi-Gbps OOK signal and the operation frequency covers the full E-Band.

2.   Design and analysis
  • Block diagram of the proposed detector is depicted in Fig. 1. It consists of four identical active devices and a quadrature structure. The quadrature structure is made of one 3 dB Lange coupler and two Marchand baluns, provides 4-ways signals with the same amplitude and 90 degree phase difference. Output signals of each PD unit are then connected together for phase cancellation.

    The prototype power detector presented in this paper is designed and implemented in WIN Semiconductors PP10-10 InGaAs 0.1-$\mu $m pHEMT technology. The typical electrical parameters of the process are 135/200 GHz transition frequency ($f_{\rm \mathrm{T}})$ and maximum oscillation frequency ($f_{\rm \mathrm{max}})$ for a $2 \times 75$ $\mu$m wide transistor. The current saturation ($I_{\rm \mathrm{D, \thinspace max}})$ is 760 mA/mm and the saturated power is 850 mW/mm. Furthermore, this Ⅲ-Ⅴ process includes the front and backside metallization, vias between the front and backside, and 400 pF/mm$^{\mathrm{2}}$ metal-insulator-metal capacitors[13, 14].

    Schematic of the proposed PD is shown in Fig. 2.

    For a common-source field effect transistor (FET) operating at the saturation region, the drain-source current ids can be written in a Taylor-series expansion up to the fourth order as[15]:

    When an input RF signal: $V_{\rm \mathrm{gs}}=V_{\rm \mathrm{rf}} \cos\omega t$ is applied to the input port of the Lange coupler, a DC current will be introduced by the even-order derivative of ids. Simultaneously, harmonics of the RF signal will be produced, as well. The phase of each harmonic generated by PD units is exhibited in Table 1. Comparing the phase of first, second, third and fourth harmonics, it is found that when the output signals of four PD units are combined, the first, second and third harmonics of the input RF signal will be suppressed due to phase cancellation. Finally, at the output of the proposed PD, a DC current with little ripples is obtained.

    One figure-of-merit of detector is voltage responsivity. It is defined as the ratio of detected output voltage to a certain input power of the RF signal, since the detected output voltage is the voltage difference without and with a given input RF signal. Previous analyses indicate that the detected output voltage equals the multiplication of the output resistance $R_{\rm d}$ and the DC current introduced by input RF signal. Then, it is obvious that the detected voltage of the proposed PD is dominated by the second order derivative of ids A2 and the resistance of drain resistor $R_{\rm d}$. To gain a higher voltage responsivity, the bias voltage of the gate should be optimized to maximize A2. As it is shown in Fig. 3, the gate of a pHEMT should be biased near the pinch-off voltage of the transistor for a higher responsivity. As to the resistance of $R_{\rm d}$, it seems that the bigger the better. Nevertheless, the determination of $R_{\rm d}$, in reality, is not an easy job at all. On one hand, increasing the value of the resistor indeed increases the detected voltage; on the other hand, the bigger resistance results in a bigger thermal noise, which degrades the noise performance of the proposed PD[2]. Obviously, the value of $R_{\rm \mathrm{d}}$ is a trade-off between voltage responsivity and noise performance. In order to minimize the parasitic capacitance for a higher data rate, the minimum size pHEMT in the provided PDK is adopted to implement the proposed PD. After optimization, the size of pHEMT is chosen as 2 $\times$ 25 $\mu$m and the value of $R_{\rm g}$, $R_{\rm {d}}$, and $V_{\rm {dd}}$ is 550 $\Omega $, 900 $\Omega $, and 3 V, respectively. The gate bias voltage is optimized to be $-0.85$ V.

3.   Simulation and experimental results
  • The dynamic response of the detector makes it critical as a demodulator in an OOK/ASKs multi-Gbps communication system. The measured dynamic response is at the moment limited by the sensitivity of measurement setup available to us. To verify the potential of the presented power detector in such an application, a transient simulation has been tested in ADS. A modulated Gbps OOK signal with an 83 GHz carrier RF frequency was imposed at the input terminal of the detector. The peak input power is 4 dBm. Fig. 4(a) depicts the input signal waveform and the simulated output signal is shown in Fig. 4(b). From the simulation, we can find that the rise and fall-time of the response is shorter than 25 ps and the maximum amplitude of the ripples is less than 10% of the output $V_{\rm p-p}$, which strongly suggests that the designed power detector functions as an envelope detector suitable for Giga-bit data rate communication systems.

    The measurement setup of the proposed PD is presented in Fig. 5. The chip size is $1 \times 1.5$ mm$^{\mathrm{2}}$, and it is characterized on-wafer. The measurements are carried out in the W-Band. The output signal is measured by an oscilloscope.

    Average output voltage, $V_{\rm out}$, as functions of input power are measured at 75, 81, 87, and 93 GHz. The results are given in Fig. 6. It can be seen that the output voltage demonstrates a very linear behavior from $-20$ to 7 dBm. It is important to say that when the input power is lower than $-20$ dBm, the output voltage still keeps linear with the input power. However, limited by the instruments, the difference of the output voltage could not be distinguished. Besides, the proposed PD shows a wideband performance, which agrees well with the results of EM simulation. The measurement of voltage responsivity was also carried out. The measured results show that the voltage responsivity varies from 700 to 950 mV/mV over the frequency range of 75-93 GHz. Finally, comparisons between this work and other reported OOK detectors are shown in Table 2.

4.   Conclusion
  • In this paper, an E-band high speed power detector using 0.1 $\mu $m pHEMT technology has been designed, manufactured and experimentally characterized. By employing a 4-way quadrature structure for phase cancellation, the first, second and third harmonics can be suppressed and the ripple at the output is minimized. Measurement results show the proposed PD gives a wideband performance and achieves a voltage responsivity better than 700 mV/mW over 75 to 93 GHz. Besides, the simulated results show that the proposed PD is able to demodulate an OOK signal up to 5 Gbps data rate. However, limited by the instruments in the laboratory, the measurement of the OOK signal demodulation is not carried out. Further experiments will carry on when the instruments are available.

Figure (6)  Table (2) Reference (15) Relative (20)

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