Design and Fabrication of Schottky Diode with Standard CMOS Process

Abstract: Design and fabrication of Schottky barrier diodes (SBD) with a commercial standard 0.35μm CMOS process are described.In order to reduce the series resistor of Schottky contact,interdigitating the fingers of schottky diode layout is adopted.The I-V,C-V,and S parameter are measured.The parameters of realized SBD such as the saturation current,breakdown voltage,and the Schottky barrier height are given.The SPICE simulation model of the realized SBDs is given.

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