Fig. 1.
(Color online) Schematic cross-sectional structure of (a) C-MOSFET, (b) CI-MOSFET, and (c) DG-MOSFET.
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Kyuhyun Cha, Kwangsoo Kim. 3.3 kV 4H-SiC DMOSFET with a source-contacted dummy gate for high-frequency applications[J]. Journal of Semiconductors, 2021, 42(6): 062801. doi: 10.1088/1674-4926/42/6/062801
K Cha, K Kim, 3.3 kV 4H-SiC DMOSFET with a source-contacted dummy gate for high-frequency applications[J]. J. Semicond., 2021, 42(6): 062801. doi: 10.1088/1674-4926/42/6/062801.
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3.3 kV 4H-SiC DMOSFET with a source-contacted dummy gate for high-frequency applications
doi: 10.1088/1674-4926/42/6/062801
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Abstract
In this paper, a 4H-SiC DMOSFET with a source-contacted dummy gate (DG-MOSFET) is proposed and analyzed through Sentaurus TCAD and PSIM simulations. The source-contacted MOS structure forms fewer depletion regions than the PN junction. Therefore, the overlapping region between the gate and the drain can be significantly reduced while limiting RON degradation. As a result, the DG-MOSFET offers an improved high-frequency figure of merit (HF-FOM) over the conventional DMOSFET (C-MOSFET) and central-implant MOSFET (CI-MOSFET). The HF-FOM (RON×QGD) of the DG-MOSFET was improved by 59.2% and 22.2% compared with those of the C-MOSFET and CI-MOSFET, respectively. In a double-pulse test, the DG-MOSFET could save total power losses of 53.4% and 5.51%, respectively. Moreover, in a power circuit simulation, the switching power loss was reduced by 61.9% and 12.7% in a buck converter and 61% and 9.6% in a boost converter.-
Keywords:
- 4H-SiC,
- MOSFET,
- dummy-gate,
- gate-drain charge,
- switching loss
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References
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