J. Semicond. > Volume 32 > Issue 11 > Article Number: 115004

High performance QVCO design with series coupling in CMOS technology

Cai Li , Huang Lu , Ying Yutong , Fu Zhongqian and Wang Weidong

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Abstract: A high performance quadrature voltage-controlled oscillator (QVCO) is presented. It has been fabricated in SMIC 0.18 μ m CMOS technology with top thick metal. The proposed QVCO employed cascade serial coupling for in phase and quadrature phase signal generation. Source degeneration capacitance is added to the NMOS differential pair to suppress their flicker noise from up-conversion to close in phase noise. A dedicated low noise and high power supply rejection low drop out regulator is used to supply this QVCO. The measured phase noise of the proposed QVCO achieves phase noise of -123.3 dBc/Hz at an offset frequency of 1 MHz from the carrier of 4.78 GHz, while the QVCO core circuit and LDO draw 6 mA from a 1.8 V supply. The QVCO can operate from 4.09 to 4.87 GHz (17.5%). Measured tuning gain of the QVCO (Kvco) spans from 44.5 to 66.7 MHz/V. The chip area excluding the pads and ESD protection circuit is 0.41 mm2.

Key words: QVCOCMOS1/f noisephase noise

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Cai L, Huang L, Ying Y T, Fu Z Q, Wang W D. High performance QVCO design with series coupling in CMOS technology[J]. J. Semicond., 2011, 32(11): 115004. doi: 10.1088/1674-4926/32/11/115004.

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History

Manuscript received: 20 August 2015 Manuscript revised: 01 June 2011 Online: Published: 01 November 2011

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