J. Semicond. > Volume 32 > Issue 12 > Article Number: 123003

In situ nanoscale refinement by highly controllable etching of the (111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire

Gong Yibin , Dai Pengfei , Gao Anran , Li Tie , Zhou Ping and Wang Yuelin

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Abstract: Nanoscale refinement on a (100) oriented silicon-on-insulator (SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide (TMAH, 25 wt%) anisotropic silicon etchant, with temperature kept at 50 ℃ to achieve precise etching of the (111) crystal plane. Specifically for a silicon nanowire (SiNW) with oxide sidewall protection, the in situ TMAH process enabled effective size reduction in both lateral (2.3 nm/min) and vertical (1.7 nm/min) dimensions. A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly, yielding enhanced field effect transistor (FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart, which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality of the (111) plane, as well as the bulk depletion property should be the causes of this electrical enhancement, which implies the great potential of the as-made cost-effective SiNW FET device in many fields.

Key words: TMAH etching

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Gong Y B, Dai P F, Gao A R, Li T, Zhou P, Wang Y L. In situ nanoscale refinement by highly controllable etching of the (111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire[J]. J. Semicond., 2011, 32(12): 123003. doi: 10.1088/1674-4926/32/12/123003.

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Manuscript received: 20 August 2015 Manuscript revised: 16 July 2011 Online: Published: 01 December 2011

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