J. Semicond. > Volume 33 > Issue 1 > Article Number: 011001

MOS Capacitance–Voltage Characteristics: IV. Trapping Capacitance from 3-Charge-State Impurities

Jie Binbin and Sah Chihtang

+ Author Affiliations + Find other works by these authors

PDF

Abstract: Metal-Oxide-Semiconductor Capacitance-Voltage (MOSCV) characteristics containing giant carrier trapping capacitances from 3-charge-state or 2-energy-level impurities are presented for not-doped, n-doped, p-doped and compensated silicon containing the double-donor sulfur and iron, the double-acceptor zinc, and the amphoteric or one-donor and one-acceptor gold and silver impurities. These impurities provide giant trapping capacitances at trapping energies from 200 to 800 meV (50 to 200 THz and 6 to 1.5 μm), which suggest potential sub-millimeter, far-infrared and spin electronics applications.

Key words: multiple charge statestrapping capacitancedopant impurity

[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[1]

Jie Binbin, Sah Chihtang. MOS Capacitance–Voltage Characteristics from Electron-Trapping at Dopant Donor Impurity. J. Semicond., 2011, 32(4): 041001. doi: 10.1088/1674-4926/32/4/041001

[2]

Jie Binbin, Sah Chihtang. MOS Capacitance-Voltage Characteristics II. Sensitivity of Electronic Trapping at Dopant Impurity from Parameter Variations. J. Semicond., 2011, 32(12): 121001. doi: 10.1088/1674-4926/32/12/121001

[3]

Jie Binbin, Sah Chihtang. MOS Capacitance-Voltage Characteristics III. Trapping Capacitance from 2-Charge-State Impurities. J. Semicond., 2011, 32(12): 121002. doi: 10.1088/1674-4926/32/12/121002

[4]

Jie Binbin, Sah Chihtang. MOS Capacitance-Voltage Characteristics: V. Methods to Enhance the Trapping Capacitance. J. Semicond., 2012, 33(2): 021001. doi: 10.1088/1674-4926/33/2/021001

[5]

Ken K. Chin. Local charge neutrality condition, Fermi level and majority carrier density of a semiconductor with multiple localized multi-level intrinsic/impurity defects. J. Semicond., 2011, 32(11): 112001. doi: 10.1088/1674-4926/32/11/112001

[6]

Zengru Zhao, Gaofeng Wang. Shallow impurity states in AlxGa1-xAs cylindrical quantum wire. J. Semicond., 2014, 35(8): 082002. doi: 10.1088/1674-4926/35/8/082002

[7]

Zhao Zengru, Liang Xixia. Effects of electron– and impurity-ion–LO phonon couples on the impurity states in cylindrical quantum wires. J. Semicond., 2009, 30(6): 062002. doi: 10.1088/1674-4926/30/6/062002

[8]

Hu Hao, Chen Xingbi. A simple expression for impurity distribution after multiple diffusion processes. J. Semicond., 2010, 31(5): 052004. doi: 10.1088/1674-4926/31/5/052004

[9]

Jin Rui, Liu Xiaoyan, Du Gang, Kang Jinfeng, Han Ruqi. Effect of trapped charge accumulation on the retention of charge trapping memory. J. Semicond., 2010, 31(12): 124016. doi: 10.1088/1674-4926/31/12/124016

[10]

Yun Kang, Sheng Wang, Xianli Li. Electron energy states in a two-dimensional GaAs quantum ring with hydrogenic donor impurity in the presence of magnetic field. J. Semicond., 2015, 36(3): 032003. doi: 10.1088/1674-4926/36/3/032003

[11]

Jing Luo, Jinlong Lu, Hongpeng Zhao, Yuehua Dai, Qi Liu, Jin Yang, Xianwei Jiang, Huifang Xu. A first-principle investigation of the oxygen defects in Si3N4-based charge trapping memories. J. Semicond., 2014, 35(1): 014004. doi: 10.1088/1674-4926/35/1/014004

[12]

Xinkai Li, Zongliang Huo, Lei Jin, Dandan Jiang, Peizhen Hong, Qiang Xu, Zhaoyun Tang, Chunlong Li, Tianchun Ye. Impact of continuing scaling on the device performance of 3D cylindrical junction-less charge trapping memory. J. Semicond., 2015, 36(9): 094008. doi: 10.1088/1674-4926/36/9/094008

[13]

Gu Haiming, Pan Liyang, Zhu Peng, Wu Dong, Zhang Zhigang, Xu Jun. Novel multi-bit non-uniform channel charge trapping memory device with virtual-source NAND flash array. J. Semicond., 2010, 31(10): 104009. doi: 10.1088/1674-4926/31/10/104009

[14]

Sangeeta Singh, P. N. Kondekar, Pawan Pal. Transient performance estimation of charge plasma based negative capacitance ewline junctionless tunnel FET. J. Semicond., 2016, 37(2): 024003. doi: 10.1088/1674-4926/37/2/024003

[15]

Jianbing Cheng, Xiaojuan Xia, Tong Jian, Yufeng Guo, Shujuan Yu, Hao Yang. Electric field optimized LDMOST using multiple decrescent and reverse charge regions. J. Semicond., 2014, 35(7): 074007. doi: 10.1088/1674-4926/35/7/074007

[16]

Chen Xin'an, Huang Qing'an. Impurity Distribution of Silicon Direct Bonding. J. Semicond., 2006, 27(11): 2051.

[17]

Xiaosong Zhao, Weihua Han, Hao Wang, Liuhong Ma, Xiaoming Li, Wang Zhang, Wei Yan, Fuhua Yang. Dopant atoms as quantum components in silicon nanoscale devices. J. Semicond., 2018, 39(6): 061003. doi: 10.1088/1674-4926/39/6/061003

[18]

Lü Weifeng, Sun Lingling. Modeling of current mismatch induced by random dopant fluctuation in nano-MOSFETs. J. Semicond., 2011, 32(8): 084003. doi: 10.1088/1674-4926/32/8/084003

[19]

Hao Wu, Miao Xu, Guangxing Wan, Huilong Zhu, Lichuan Zhao, Xiaodong Tong, Chao Zhao, Dapeng Chen, Tianchun Ye. On substrate dopant engineering for ET-SOI MOSFETs with UT-BOX. J. Semicond., 2014, 35(11): 114006. doi: 10.1088/1674-4926/35/11/114006

[20]

Jing Zhang, Ding Liu, Yani Pan. Suppression of oxygen and carbon impurity deposition in the thermal system of Czochralski monocrystalline silicon. J. Semicond., 2020, 41(10): 102702. doi: 10.1088/1674-4926/41/10/102702

Search

Advanced Search >>

GET CITATION

Jie B B, Sah C T. MOS Capacitance–Voltage Characteristics: IV. Trapping Capacitance from 3-Charge-State Impurities[J]. J. Semicond., 2012, 33(1): 011001. doi: 10.1088/1674-4926/33/1/011001.

Export: BibTex EndNote

Article Metrics

Article views: 2410 Times PDF downloads: 1969 Times Cited by: 0 Times

History

Manuscript received: 18 August 2015 Manuscript revised: Online: Published: 01 January 2012

Email This Article

User name:
Email:*请输入正确邮箱
Code:*验证码错误