J. Semicond. > Volume 34 > Issue 9 > Article Number: 095002

A low-power 20 GSps track-and-hold amplifier in 0.18 μm SiGe BiCMOS technology

Kai Tang 1, 2, , Qiao Meng 1, 2, , , Zhigong Wang 1, 2, , Yi Zhang 1, 2, , Kuai Yin 1, 2, and Ting Guo 1, 2,

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Abstract: An open-loop 20 GSps track-and-hold amplifier (THA) using fully-differential architecture to mitigate common-mode noise and suppress even-order harmonics is presented. CMOS switch and dummy switches are adopted to achieve high speed and good linearity. A cross-coupled pair is used in the input buffer to suppress the charge injection and clock feedthrough. Both the input and output buffers use an active inductor load to achieve high signal bandwidth. The THA is realized with 0.18 μm SiGe BiCMOS technology using only CMOS devices at a 1.8 V voltage supply and with a core area of 0.024 mm2. The measurement results show that the SFDR is 32.4 dB with a 4 GHz sine wave input at a 20 GSps sampling rate, and the third harmonic distortion is -48 dBc. The effective resolution bandwidth of the THA is 12 GHz and the figure of merit is only 0.028 mW/GHz.

Key words: track-and-hold amplifier (THA)ADCultra-high-speedSiGe BiCMOSlow power

Abstract: An open-loop 20 GSps track-and-hold amplifier (THA) using fully-differential architecture to mitigate common-mode noise and suppress even-order harmonics is presented. CMOS switch and dummy switches are adopted to achieve high speed and good linearity. A cross-coupled pair is used in the input buffer to suppress the charge injection and clock feedthrough. Both the input and output buffers use an active inductor load to achieve high signal bandwidth. The THA is realized with 0.18 μm SiGe BiCMOS technology using only CMOS devices at a 1.8 V voltage supply and with a core area of 0.024 mm2. The measurement results show that the SFDR is 32.4 dB with a 4 GHz sine wave input at a 20 GSps sampling rate, and the third harmonic distortion is -48 dBc. The effective resolution bandwidth of the THA is 12 GHz and the figure of merit is only 0.028 mW/GHz.

Key words: track-and-hold amplifier (THA)ADCultra-high-speedSiGe BiCMOSlow power



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[1]

Li X, Kuo W M L, Cressler J D. A 40 GS/s SiGe track-and-hold amplifier[J]. IEEE BCTM 1.1, 2008: 1.

[2]

Lu Y, Kuo W M L, Li X. An 8-bit, 12 GSample/sec SiGe track-and-hold amplifier[J]. Proc BCTM, 2005: 148.

[3]

Lee J, Baeyens Y, Weiner J. A 50 GS/S distributed T/H amplifier in 0.18μm SiGe BiCMOS[J]. IEEE ISSCC, 2007: 446.

[4]

Orser H, Gopinath A. A 20GS/s 1.2 V 0.13μm CMOS switched cascode track-and-hold amplifier[J]. IEEE Trans Circuits Syst Ⅱ:Express Briefs, 2010, 57(7): 512. doi: 10.1109/TCSII.2010.2048484

[5]

Li X, Kuo W L, Lu Y. A 5-bit, 18 GS/sec SiGe HBT track-and-hold amplifier[J]. IEEE CSICS, 2005: 105.

[6]

Yamanaka S, Sano K, Murata K. A 20-Gs/s track-and-hold amplifier in InP HBT technology[J]. IEEE Trans Microw Theory Tech, 2010, 58(9): 2334. doi: 10.1109/TMTT.2010.2057174

[7]

Borokhovych Y, Gustat H, Tillack B. A low-power, 10 Gs/s track-and-hold amplifier in SiGe BiCMOS technology[J]. Proceedings of ESSCIRC, Grenoble, France, 2005: 263.

[8]

Tang K, Meng Q. A 20 GSps track-and-hold circuit in 90 nm CMOS technology[J]. IEEE Proceeding of ICATC, 2012: 237.

[9]

Wang I H, Liu S I. A 4-bit, 13.5 G Sample/sec track-and-hold circuit[J]. VLSI Design, Automation and Test, 2007: 1.

[10]

Han L, Liu X, Bai T. A 2.5 Gb/s CMOS low noise transimpedance amplifier with active feedback[J]. Research & Progress of Solid State Electronics,, 2008, 28(3): 415.

[11]

Fayomi C J B, Roberts G W, Sawan M. Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit:design and chip characterization[J]. Proceedings of the IEEE ISCAS, Kobe, 2005, 23: 2200.

[12]

Jakonis D, Svenson C. A 1 GHz linearized CMOS track and hold circuit[J]. Proceedings of the IEEE ISCAS, Arizona, 2002, 5: 597.

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K Tang, Q Meng, Z G Wang, Y Zhang, K Yin, T Guo. A low-power 20 GSps track-and-hold amplifier in 0.18 μm SiGe BiCMOS technology[J]. J. Semicond., 2013, 34(9): 095002. doi: 10.1088/1674-4926/34/9/095002.

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History

Manuscript received: 21 February 2013 Manuscript revised: 03 April 2013 Online: Published: 01 September 2013

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