J. Semicond. > 2016, Volume 37 > Issue 1 > Article Number: 015005

A reference voltage in capacitor-resister hybrid SAR ADC for front-end readout system of CZT detector

Wei Liu 1, , , Tingcun Wei 1, , Bo Li 1, , Lifeng Yang 1, and Yongcai Hu 1, 2,

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  • Corresponding author: Wei Liu, Liu Wei,Email:liouwei930@sina.com
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    Abstract: An on-chip reference voltage has been designed in capacitor-resister hybrid SAR ADC for CZT detector with the TSMC 0.35 μ m 2P4M CMOS process. The voltage reference has a dynamic load since using variable capacitors and resistances, which need a large driving ability to deal with the current related to the time and sampling rate. Most of the previous articles about the reference for ADC present only the bandgap part for a low temperature coefficient and high PSRR. However, it is not enough and overall, it needs to consider the output driving ability. The proposed voltage reference is realized by the band-gap reference, voltage generator and output buffer. Apart from a low temperature coefficient and high PSRR, it has the features of a large driving ability and low power consumption. What is more, for CZT detectors application in space, a radiation-hardened design has been considered. The measurement results show that the output reference voltage of the buffer is 4.096 V. When the temperature varied from 0 to 80℃, the temperature coefficient is 12.2 ppm/℃. The PSRR was-70 dB@100 kHz. The drive current of the reference can reach up to 10 mA. The area of the voltage reference in the SAR ADC chip is only 449×614 μm2. The total power consumption is only 1.092 mW.

    Key words: reference voltageSAR ADCCZT detector



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    Qiao Ning, Gao Jiantou, Zhao Kai. A 14-bit wide temperature range differential SAR ADC with an on-chip multi-segment BGR[J]. Journal of Semiconductors, 2011, 32(8): 085003.

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    Chen Huabin, Xiang Jixuan, Xue Xiangyan. An analog front end with a 12-bit 3.2-MS/s SAR ADC for a power line communication system.[J]. Journal of Semiconductors, 2014, 35(11): 115008.

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    Cheng D, Li X, Zhang J. A dual-output voltage reference for high-accuracy pipelined ADC[J]. International Conference on Electronic Packaging Technology & High Density Packaging, 2008.

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    Yang X, Deng H, Quan L. A differential reference voltage source and its output buffer used in high-speed high-precision pipelined ADC[J]. 5th International Congress on Image and Signal Processing, 2012.

    [1]

    Grindlay J, Hong J, Allen B. Development of tiled imaging CZT detectors for sensitive wide-field hard X-ray surveys to EXIST[J]. Nuclear Instruments and Methods in Physics Research Section A:Accelerators, Spectrometers, Detectors and Associated Equipment, 2011, 652(1): 671.

    [2]

    Li Q, Beilicke M, Lee K. Study of thick CZT detectors for X-ray and Gamma-ray astronomy[J]. Astroparticle Physics, 2011, 34(10): 769.

    [3]

    Butcher J, Hamade M, Petryk M. Drift time variations in CdZnTe detectors measured with alpha particles and gamma rays:their correlation with detector response[J]. IEEE Trans Nucl Sci, 2013, 60(2): 1189.

    [4]

    Overdick M, Baumer C, Engle K J. Status of direct conversion detectors for medical imaging with X-rays[J]. IEEE Trans Nucl Sci, 2009, 56(4): 1800.

    [5]

    Xu L, Jie W, Zha G. Radiation damage on CdZnTe:In crystals under high dose 60Co γ-rays[J]. Cryst Eng Comm, 2013, 15(47): 10304.

    [6]

    Gao W, Gan B, Li X. Development of a compact radiation-hardened low-noise front-end readout ASIC for CZT-based hard X-ray imager[J]. Nuclear Instruments and Method in Physics Research A, 2015, 780: 15.

    [7]

    Qiao Ning, Gao Jiantou, Zhao Kai. A 14-bit wide temperature range differential SAR ADC with an on-chip multi-segment BGR[J]. Journal of Semiconductors, 2011, 32(8): 085003.

    [8]

    Zhang Zhang, Yuan Yudan, Guo Yawei. A 1.2-V 19.2 mW 10-bit 30 MS/s pipelined ADC in 0.13-μm CMOS.[J]. Journal of Semiconductors, 2010, 31(9): 095014.

    [9]

    Razavi B. Design of analog CMOS integrated circuits[J]. Xi'an Jiaotong University Press, 2002: 317.

    [10]

    Huijsing J H. Operational amplifiers theory and design[J]. Kluwer Academic Publishers, 2006: 312.

    [11]

    Gevin O, Baron P, Coppolani X. IDeF-X ECLAIRs:an ultra low noise CMOS ASIC for the readout of Cd(Zn)Te detectors[J]. IEEE Science Symposium/Medical Imaging Conference, 2007: 326.

    [12]

    Chen Huabin, Xiang Jixuan, Xue Xiangyan. An analog front end with a 12-bit 3.2-MS/s SAR ADC for a power line communication system.[J]. Journal of Semiconductors, 2014, 35(11): 115008.

    [13]

    Cheng D, Li X, Zhang J. A dual-output voltage reference for high-accuracy pipelined ADC[J]. International Conference on Electronic Packaging Technology & High Density Packaging, 2008.

    [14]

    Yang X, Deng H, Quan L. A differential reference voltage source and its output buffer used in high-speed high-precision pipelined ADC[J]. 5th International Congress on Image and Signal Processing, 2012.

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    W Liu, T C Wei, B Li, L F Yang, Y C Hu. A reference voltage in capacitor-resister hybrid SAR ADC for front-end readout system of CZT detector[J]. J. Semicond., 2016, 37(1): 015005. doi: 10.1088/1674-4926/37/1/015005.

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    History

    Manuscript received: 24 July 2015 Manuscript revised: Online: Published: 01 January 2016

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