J. Semicond. > 2024, Volume 45 > Issue 11 > 111301
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REVIEWS

Recent developments in superjunction power devices

Chao Ma, Weizhong Chen, Teng Liu, Wentong Zhang and Bo Zhang

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 Corresponding author: Bo Zhang, zhangbo@uestc.edu.cn

DOI: 10.1088/1674-4926/24050003

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Abstract: Superjunction (SJ) is one of the most innovative concepts in the field of power semiconductor devices and is often referred to as a "milestone" in power MOS. Its balanced charge field modulation mechanism breaks through the strong dependency between the doping concentration in the drift region and the breakdown voltage VB in conventional devices. This results in a reduction of the trade-off relationship between specific on-resistance Ron,sp and VB from the conventional Ron,sp∝VB2.5 to Ron,sp∝W∙VB1.32, and even to Ron,sp∝W·VB1.03. As the exponential term coefficient decreases, Ron,sp decreases with the cell width W, exhibiting a development pattern reminiscent of "Moore’s Law". This paper provides an overview of the latest research developments in SJ power semiconductor devices. Firstly, it introduces the minimum specific on-resistance Ron,min theory of SJ devices, along with its combination with special effects like 3-D depletion and tunneling, discussing the development of Ron,min theory in the wide bandgap SJ field. Subsequently, it discusses the latest advancements in silicon-based and wide bandgap SJ power devices. Finally, it introduces the homogenization field (HOF) and high-K voltage-sustaining layers derived from the concept of SJ charge balance. SJ has made significant progress in device performance, reliability, and integration, and in the future, it will continue to evolve through deeper integration with different materials, processes, and packaging technologies, enhancing the overall performance of semiconductor power devices.

Key words: super junction, silicon limit, power semiconductor device, design theory



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Fig. 1.  (Color online) Typical product performance of 600 V class super junction MOSFET for 25 years.

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Fig. 2.  (Color online) (a) Structure of SJ and electric field dissertation along the avalanche breakdown path; three-dimensional distribution of bulk electric field in (b) SJ and non-SJ (c) devices.

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Fig. 3.  (Color online) R-well distribution and Ron,min of SJ.

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Fig. 4.  (Color online) Avalanche breakdown path and its electric field of 3-D SJ.

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Fig. 5.  (Color online) Double R-well distributions of 3-D SJ.

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Fig. 6.  (Color online) Ron,sp versus W functions of SJ.

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Fig. 7.  (Color online) R-well distribution a of SiC SJ.

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Fig. 8.  (Color online) Typical structures of SJ IGBT with (a) P-pillar connected to P-body and (b) P-pillar separated from P-body can achieve lower turn-off losses under different SJ doping concentrations. Reproduced with permission from Refs. [25, 26].

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Fig. 9.  (Color online) (a) Structure and (b) SEM of SJ IGBT with ultra-thin wafer thickness; compared with thin SJ-IGBT both at 650 A/cm2 and at room temperature, the on-state voltage of the ultrathin SJ-IGBT could be decreased by about 160 mV, turn-off energy loss could be decreased by 22%. Reproduced with permission from Ref. [26].

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Fig. 10.  (Color online) Super-Q devices. (a) Concept and (b) SEM picture. Reproduced with permission from Ref. [28].

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Fig. 11.  (Color online) Integrated SJ device with optimized ES.

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Fig. 12.  (Color online) Integrated sub-micron SJ device; a measured low Ron,sp of 27.8 mΩ· cm2 was observed under a VB of 622.6 V.

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Fig. 13.  (Color online) (a) SiC SJ based on deep trend etching and tilted implantation. (b) The experiment verifies that the device achieves a Ron,sp of 80 mΩ·cm² while withstanding a VB of 1200 V. Reproduced with permission from Ref. [39].

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Fig. 14.  SiC SJ based on multiple epitaxy and repeated implantations. A 1.2 kV-class superjunction (SJ) UMOSFET was realized using a multi-epitaxial growth method. Reproduced with permission from Ref. [40].

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Fig. 15.  (Color online) Deep trench etching and epitaxial filling process for SiC SJ. The measured Ron,sp of a 7.8 kV SJ MOSFET was 17.8 mΩ·cm2, which is less than half the Ron,sp of the state-of-the-art 6.5 kV-class SiC MOSFET with an n-type drift layer. Reproduced with permission from Ref. [43].

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Fig. 16.  (Color online) (a) Schematic view and (b) SEM of SiC charge-balanced (CB) MOSFET. Reproduced with permission from Ref. [44].

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Fig. 17.  (Color online) GaN SJ with multiple current paths. It has been reported that GaN SJ has achieved a Ron,sp reduction to 100.8 mΩ·cm2 at a VB of 12.5 kV.

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Fig. 18.  (Color online) Vertical GaN SJ device structure. (a) SJ GaN diode; (b) SJ high electron mobility transistor. Reproduced with permission from Ref. [58, 59].

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Fig. 19.  (Color online) SEM image of vertical GaN SJ device. (a) Side-view SEM images of GaN pillars; (b) cross-section FIB-SEM images of the SJ region. GaN SJ-PNDs on GaN and sapphire both show a VB of 1100 V, with the Ron,sp extracted to be mΩ·cm. Reproduced with permission from Ref. [60].

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Fig. 20.  (Color online) HOF structure and electric field. (a) Schematic structure; (b) 3D electric field distribution.

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Fig. 21.  (Color online) New structures of HOF devices; (a) S-HOF device; (b) C-HOF device; (c) M-HOF device; it has been demonstrated experimentally that the M-HOF device achieved a Ron,sp of only 15.5 mΩ·cm2 at a breakdown voltage VB of 436 V.

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Fig. 22.  (Color online) Dielectric termination technology; continuous MIS trenchs are introduced at the terminal curvature junction, which intercepts the electric field lines directed towards the region with smaller curvature.

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Fig. 23.  (Color online) Measured results of HOF devices. (a) VB and Ron,sp as functions of Dn. (b) On-state Id versus Vd curves.

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Fig. 24.  (Color online) (a) VDMOS with high-K dielectric. (b) Two-dimensional electric field vector distribution. Reproduced with permission from Ref. [68].

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Fig. 25.  (a) Mechanism of high-K device. (b) Hexagonal cell structure of high-K device. Reproduced with permission from Ref. [69, 70].

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Fig. 26.  (Color online) Discrete high-K devices. (a) High-K dielectric UMOS structure with a low-resistance channel. (b) High-K trench gate IGBT.

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Fig. 27.  (Color online) Integrated high-K devices. (a) PLDMOS. (b) Three-gate LDMOS. (c) SJ LDMOS. (d) Trench-type LDMOS.

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Fig. 28.  (Color online) A comparison of the performance of current SJ devices.

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Fig. 29.  (Color online) Prospects of SJ.

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    Received: 02 May 2024 Revised: 25 June 2024 Online: Accepted Manuscript: 19 August 2024Uncorrected proof: 21 August 2024Published: 15 November 2024

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      Article Navigation >  Journal of Semiconductors  > 2024  >  45(11): 111301
      Chao Ma, Weizhong Chen, Teng Liu, Wentong Zhang, Bo Zhang. Recent developments in superjunction power devices[J]. Journal of Semiconductors, 2024, 45(11): 111301. doi: 10.1088/1674-4926/24050003 ****C Ma, W Z Chen, T Liu, W T Zhang, and B Zhang, Recent developments in superjunction power devices[J]. J. Semicond., 2024, 45(11), 111301 doi: 10.1088/1674-4926/24050003
      Citation:
      Chao Ma, Weizhong Chen, Teng Liu, Wentong Zhang, Bo Zhang. Recent developments in superjunction power devices[J]. Journal of Semiconductors, 2024, 45(11): 111301. doi: 10.1088/1674-4926/24050003 ****
      C Ma, W Z Chen, T Liu, W T Zhang, and B Zhang, Recent developments in superjunction power devices[J]. J. Semicond., 2024, 45(11), 111301 doi: 10.1088/1674-4926/24050003
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      Recent developments in superjunction power devices

      DOI: 10.1088/1674-4926/24050003

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

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      • Chao Ma received the B.S. degree in microelectronics from University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2010, and M.S. degree in integrated circuit engineering from University of Chinese Academy of Sciences, Beijing, China, in 2014. Currently, he is pursuing his doctoral degree at UESTC under the supervision of Professor Bo Zhang. His research interests focus on semiconductor physical devices and integrated circuits
      • Weizhong Chen received the Ph.D. degree in microelectronics from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2014, visiting scholar of the Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany, and post Ph.D. of Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China, in 2022. He is a professor of the Chongqing University of Posts and Telecommunications. he has authored or co-authored over 50 papers and holds over 60 Chinese patents. His research interests include power devices and integrated power system
      • Teng Liu worked as a Process Integration R & D Engineer at China Resources Microelectronics in 2019, and received the M.S. degree in microelectronics from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2023. Currently, he is pursuing his doctoral degree at UESTC under the supervision of Professor Bo Zhang. His research interests include Power Semiconductor Devices and Power Integrated Technologies
      • Wentong Zhang received the B.S. and Ph.D. degrees from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2010 and 2016, respectively. He is currently a professor at the School of Integrated Circuit Science and Engineering, UESTC. His research interests include Power Semiconductor Devices and Power Integrated Technologies
      • Bo Zhang received the B.S. degree in electronic engineering from the Beijing Institute of Technology, Beijing, China, in 1985, and the M.S. degree from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988. He is currently a professor at the School of Integrated Circuit Science and Engineering, UESTC, where he also serves as the Director of the Center for Integrated Circuits
      • Corresponding author: zhangbo@uestc.edu.cn
      • Received Date: 2024-05-02
      • Revised Date: 2024-06-25
        • Available Online: 2024-08-19

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