Fig. 1.
Block diagram of the two-channel digital hearing aid system.
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| Citation: |
Chengying Chen, Hainan Liu, Yong Hei, Jun Fan, Xiaoyu Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. Journal of Semiconductors, 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011
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C Y Chen, H N Liu, Y Hei, J Fan, X Y Hu. A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC[J]. J. Semicond., 2013, 34(10): 105011. doi: 10.1088/1674-4926/34/10/105011.
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A low-power high-performance configurable auto-gain control loop for a digital hearing aid SoC
DOI: 10.1088/1674-4926/34/10/105011
More Information
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Abstract
A low-power, configurable auto-gain control loop for a digital hearing aid system on a chip (SoC) is presented. By adopting a mixed-signal feedback control structure and peak detection and judgment, it can work in automatic gain or variable gain control modes through a digital signal processing unit. A noise-reduction and dynamic range (DR) improvement technique is also used to ensure the DR of the circuit in a low-voltage supply. The circuit is implemented in an SMIC 0.13 μm 1P8M CMOS process. The measurement results show that in a 1 V power supply, 1.6 kHz input frequency and 200 mVp-p, the SFDR is 74.3 dB, the THD is 66.1 dB, and the total power is 89 μ W, meeting the application requirements of hearing aid SoCs.-
Keywords:
- hearing aid device,
- low power,
- gain control,
- digital feedback
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References
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