J. Semicond. > 2013, Volume 34 > Issue 2 > 025005
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SEMICONDUCTOR INTEGRATED CIRCUITS

A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation

Danzhu Lü, Jiale Yu and Zhiliang Hong

+ Author Affiliations

 Corresponding author: Hong Zhiliang, Email:zlhong@fudan.edu.cn

DOI: 10.1088/1674-4926/34/2/025005

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Abstract: A 10 MHz ripple-based on-time controlled buck converter is presented. A novel low-cost dual ripple compensation, which consists of coupling capacitor compensation and passive equivalent series resistance compensation, is proposed to achieve a fast load transient response and robust stability simultaneously. Implemented in a 2P4M 0.35 μm CMOS process, the converter achieves fix-frequency output with a ripple of below 10 mV and an overshoot of 10 mV at 400 mA step load transient response. With width optimization of the power transistors in an ultra-heavy load and PFM control in a light load, the efficiency stays at over 83% for a load range from 20 mA to 1.5 A and the peak efficiency reaches 90.16%.

Key words: ripple-based on-time control, dual ripple compensation, high switching frequency buck converter



[1]
Du M, Lee H, Liu J. A 5-MHz 91% peak-power-efficiency buck regulator with auto-selectable peak-and valley-current control. IEEE J Solid-State Circuits, 2011, 46(8):1928 doi: 10.1109/JSSC.2011.2151470
[2]
Maity A, Patra A, Yamamura N, et al. Design of a 20 MHz DC-DC buck converter with 84 percent efficiency for portable applications. Proc Int Conf VLSI Design, 2011:316 doi: 10.1007/s10470-015-0589-9
[3]
Redl R, Sun J. Ripple-based control of switching regulators——an overview. IEEE Trans Power Electron, 2009, 24(12):2669 doi: 10.1109/TPEL.2009.2032657
[4]
Li J, Lee F C. Modeling of V2 current-mode control. IEEE Trans Circuits Syst I, 2010, 57(9):2552 doi: 10.1109/TCSI.2010.2043018
[5]
Lee K, Lee F C, Xu M. Novel hysteretic control method for multiphase voltage regulators. Proc IEEE Applied Power Electronics Conference and Exposition (APEC), 2008:1508 http://www.nsfc.gov.cn/Portals/0/fj/fj20160106_01.xls
[6]
Zhou X, Fan J, Huang A. Monolithic DC offset self-calibration method for adaptive on-time control buck converter. Proc IEEE Energy Convers Congr Expo (ECCE), 2009:655 http://scm.nsfc.gov.cn/indexhtml/pub_maint_en_US.html
[7]
Chen H, Ma D. A fast-transient DVS-capable switching converter with ΔIL-emulated hysteretic control. Proc IEEE Symp VLSI Circuits, 2011:282
[8]
Lu D, Yu J, Hong Z, et al. A 1500 mA, 10 MHz on-time controlled buck converter with ripple compensation and efficiency optimization. Proc IEEE Applied Power Electronics Conference and Exposition (APEC), 2012:1232
[9]
Rocha J, Santos M, Santos G, et al. Limiting internal supply voltage spikes in DC-DC converters. Proc IEEE Int Symp Industrial Electron (ISIE), 2009:1060
[10]
Sahu B, Rincon-Mora G A. An accurate, low-voltage, CMOS switching power supply with adaptive on-time pulse-frequency modulation (PFM) control. IEEE Trans Circuits Syst I, 2007, 54(2):312 doi: 10.1109/TCSI.2006.887472
[11]
Cliquennois S, Donida A, Malcovati P, et al. A 65-nm, 1-A buck converter with multi-function SAR-ADC-based CCM/PSK digital control loop. Proc IEEE ESSCIRC, 2011:427
[12]
Parayandeh A, Mahdavikkhah B, Ahsanuzzaman S M, et al. A 10 MHz mixed-signal CPM controlled DC-DC converter IC with novel gate swing circuit and instantaneous efficiency optimization. Proc IEEE Energy Convers Congr Expo (ECCE), 2011:1229
Fig. 1.  (a) Circuit of conventional RBOT control for buck converter. (b) Component of the output ripple for RBOT control.

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Fig. 2.  Stability problem of the RBOT controlled buck converter caused by parasitical inductors.

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Fig. 3.  Load transition with different output capacitor ESRs ($V_{\rm DD}$ $=$ 3.6 V, $V_{\rm REF}$ $=$ 1 V, $L$ $=$ 0.47 $\mu$H, $C$ $=$ 4.7 $\mu$F).

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Fig. 4.  (a) Comparator with a coupling capacitor. (b) Bode diagram of $f_i(s)$ with various $C_{\rm c}$ ($R=$ 20 k$\Omega)$.

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Fig. 5.  (a) Structure of the PESRC. (b) Bode diagram of $G_{\rm i} (s)$ and $G'_{\rm i}(s)$ ($R_{1}$ $=$ $R_{4}$ $=$ 200 k$\Omega$, $R_{2}$ $=$ 50 k$\Omega$, $R_{3}$ $=$ 10 k$\Omega$, $R$ $=$ 20 k$\Omega$, $C_{1}$ $=$ 2 pF, $C_{2}$ $=$ 8 pF).

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Fig. 6.  The entire voltage components of the dual ripple compensation.

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Fig. 7.  System block diagram of the proposed buck converter.

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Fig. 8.  (a) Schematic and (b) control sequence of RBOT and PFM control.

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Fig. 9.  Schematic of mode converter.

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Fig. 10.  Chip micrograph.

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Fig. 11.  Measured steady-state waveforms of output voltage with dual ripple compensation.

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Fig. 12.  Measured load transient of 400 mA step with different effective ESR ($V_{\rm in}$ $=$ 3 V, $V_{\rm out}$ $=$ 1 V).

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Fig. 13.  Measured mode switching of 400 mA load step.

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Fig. 14.  Measured efficiency.

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Table 1.   Measured performance comparison.
[1]
Du M, Lee H, Liu J. A 5-MHz 91% peak-power-efficiency buck regulator with auto-selectable peak-and valley-current control. IEEE J Solid-State Circuits, 2011, 46(8):1928 doi: 10.1109/JSSC.2011.2151470
[2]
Maity A, Patra A, Yamamura N, et al. Design of a 20 MHz DC-DC buck converter with 84 percent efficiency for portable applications. Proc Int Conf VLSI Design, 2011:316 doi: 10.1007/s10470-015-0589-9
[3]
Redl R, Sun J. Ripple-based control of switching regulators——an overview. IEEE Trans Power Electron, 2009, 24(12):2669 doi: 10.1109/TPEL.2009.2032657
[4]
Li J, Lee F C. Modeling of V2 current-mode control. IEEE Trans Circuits Syst I, 2010, 57(9):2552 doi: 10.1109/TCSI.2010.2043018
[5]
Lee K, Lee F C, Xu M. Novel hysteretic control method for multiphase voltage regulators. Proc IEEE Applied Power Electronics Conference and Exposition (APEC), 2008:1508 http://www.nsfc.gov.cn/Portals/0/fj/fj20160106_01.xls
[6]
Zhou X, Fan J, Huang A. Monolithic DC offset self-calibration method for adaptive on-time control buck converter. Proc IEEE Energy Convers Congr Expo (ECCE), 2009:655 http://scm.nsfc.gov.cn/indexhtml/pub_maint_en_US.html
[7]
Chen H, Ma D. A fast-transient DVS-capable switching converter with ΔIL-emulated hysteretic control. Proc IEEE Symp VLSI Circuits, 2011:282
[8]
Lu D, Yu J, Hong Z, et al. A 1500 mA, 10 MHz on-time controlled buck converter with ripple compensation and efficiency optimization. Proc IEEE Applied Power Electronics Conference and Exposition (APEC), 2012:1232
[9]
Rocha J, Santos M, Santos G, et al. Limiting internal supply voltage spikes in DC-DC converters. Proc IEEE Int Symp Industrial Electron (ISIE), 2009:1060
[10]
Sahu B, Rincon-Mora G A. An accurate, low-voltage, CMOS switching power supply with adaptive on-time pulse-frequency modulation (PFM) control. IEEE Trans Circuits Syst I, 2007, 54(2):312 doi: 10.1109/TCSI.2006.887472
[11]
Cliquennois S, Donida A, Malcovati P, et al. A 65-nm, 1-A buck converter with multi-function SAR-ADC-based CCM/PSK digital control loop. Proc IEEE ESSCIRC, 2011:427
[12]
Parayandeh A, Mahdavikkhah B, Ahsanuzzaman S M, et al. A 10 MHz mixed-signal CPM controlled DC-DC converter IC with novel gate swing circuit and instantaneous efficiency optimization. Proc IEEE Energy Convers Congr Expo (ECCE), 2011:1229

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    Received: 12 July 2012 Revised: 18 August 2012 Online: Published: 01 February 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(2): 025005
      Danzhu Lü, Jiale Yu, Zhiliang Hong. A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation[J]. Journal of Semiconductors, 2013, 34(2): 025005. doi: 10.1088/1674-4926/34/2/025005 ****D Z Lü, J L Yu, Z L Hong. A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation[J]. J. Semicond., 2013, 34(2): 025005. doi:  10.1088/1674-4926/34/2/025005.
      Citation:
      Danzhu Lü, Jiale Yu, Zhiliang Hong. A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation[J]. Journal of Semiconductors, 2013, 34(2): 025005. doi: 10.1088/1674-4926/34/2/025005 ****
      D Z Lü, J L Yu, Z L Hong. A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation[J]. J. Semicond., 2013, 34(2): 025005. doi:  10.1088/1674-4926/34/2/025005.
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      A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation

      DOI: 10.1088/1674-4926/34/2/025005

      • State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China

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      • Corresponding author: Hong Zhiliang, Email:zlhong@fudan.edu.cn
      • Received Date: 2012-07-12
      • Revised Date: 2012-08-18
      • Published Date: 2013-02-01

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