Fig. 1.
Pseudo-two-stage class-AB OTA.
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| Citation: |
Shujuan Yin, Xiangyu Li. A 1.2-V, 84-dB $\Sigma\Delta$ ADM in 0.18-μm digital CMOS technology[J]. Journal of Semiconductors, 2013, 34(8): 085003. doi: 10.1088/1674-4926/34/8/085003
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S J Yin, X Y Li. A 1.2-V, 84-dB \begin{document}$\Sigma\Delta$\end{document} ADM in 0.18-μm digital CMOS technology[J]. J. Semicond., 2013, 34(8): 085003. doi: 10.1088/1674-4926/34/8/085003.
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A 1.2-V, 84-dB $\Sigma\Delta$ ADM in 0.18-μm digital CMOS technology
DOI: 10.1088/1674-4926/34/8/085003
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Abstract
A low power and low voltage $\Sigma\Delta$ analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors. Compared with mixed signal technology, this type of modulator is more compatible for pure digital applications. A pseudo-two-stage class-AB OTA is used in switched-capacitor integrators for low voltage and low power. The modulator is realized in standard SMIC 0.18 μm 1P6M digital CMOS technology. Measured results show that with 1.2 V supply voltage and a 6 MHz sample clock, the dynamic range of the modulator is 84 dB and the total power dissipation is 2460 μW. -
References
[1] Yao Libin. Low-power low-voltage sigma-delta modulators in nanometer CMOS. Catholic University Leuven, Belgium, 2006 doi: 10.1007/1-4020-4140-3[2] Jeongjin R. High-gain class-AB OTA with low quiescent current. Springer Science Business Media, February 2006 doi: 10.1007%2Fs10470-006-4959-1.pdf[3] Yin Shujuan, Sun Yihe, Li Xiangyu. Digital 1 V 82μW pseudo-two-stage class-AB OTA with pure digital technology. Tsinghua Science and Technology, 2009, 14(5):53[4] Chen Haizhen, Huang Songren, Zhang Hong. A 27 mW 10-bit 125-MSPS charge domain pipelined ADC with a PVT insensitive boosted charge transfer circuit. Journal of Semiconductors, 2013, 34(3):035009 doi: 10.1088/1674-4926/34/3/035009[5] Geng B. 0. 13μm mixed signal 1P8M (1P7M, 1P6M) silicate 1. 2 V/2. 5 V SPICE model (Version 2. 0). Attachment No. : QR-QUSM-02-2001-002[6] Yin Shujuan, SunYihe. Full compensated depletion-mode MOS-capacitor for pure digital technology low voltage switched-capacitor applications. IEEE International Conference on Electron Devices and Solid-State Circuits, 2007, 1:913 http://ieeexplore.ieee.org/document/4450274/authors[7] Yoshizawa H, Huang Y, Temes G C. MOSFET-only switched-capacitor circuits in digital CMOS technology. IEEE J Solid-State Circuits, 1999, 34:734 doi: 10.1109/4.766808[8] Tille T, Sauerbrey J. Design of low-voltage MOSFET-only sigma-delta modulators in standard digital CMOS technology. IEEE Trans Circuits Syst Ⅰ, 2004, 51(1):96 doi: 10.1109/TCSI.2003.821296[9] Goes J, Vaz B. A 0.9 V $\Sigma\Delta$ modulator with 80 dB SNDR and 83 dB DR using a single-phase technique. IEEE ISSCC Dig Tech, San Francisco, 2006:74[10] Roh J, Byun S. A 0.9 V 60μW 1 bit fourth-order delta-sigma modulator with 83-dB dynamic range. IEEE J Solid-State Circuits, 2008, 43(2):225 http://soc.hanyang.ac.kr/kor/journal/international/jssc_0802.pdf -
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