Fig. 1.
System structure of the wireless positioning sensor based on IR-UWB.
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Zhaoxin Ma, Xuefei Bai, Lu Huang. Design of a delay-locked-loop-based time-to-digital converter[J]. Journal of Semiconductors, 2013, 34(9): 095003. doi: 10.1088/1674-4926/34/9/095003
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Z X Ma, X F Bai, L Huang. Design of a delay-locked-loop-based time-to-digital converter[J]. J. Semicond., 2013, 34(9): 095003. doi: 10.1088/1674-4926/34/9/095003.
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Design of a delay-locked-loop-based time-to-digital converter
DOI: 10.1088/1674-4926/34/9/095003
More Information
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Abstract
A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid "false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7×0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.-
Keywords:
- TDC,
- DLL,
- multiphase clock,
- false lock,
- jitter
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References
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