Fig. 1.
Timing diagrams for gate and substrate pulsing and triggering[12].
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| Citation: |
Ahmed Chaouki Megherbi, Said Benramache, Abderrazak Guettaf. Backgating effect in GaAs FETs with a channel-semi-insulating substrate boundary[J]. Journal of Semiconductors, 2014, 35(3): 034004. doi: 10.1088/1674-4926/35/3/034004
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A C Megherbi, S Benramache, A Guettaf. Backgating effect in GaAs FETs with a channel-semi-insulating substrate boundary[J]. J. Semicond., 2014, 35(3): 034004. doi: 10.1088/1674-4926/35/3/034004.
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Backgating effect in GaAs FETs with a channel-semi-insulating substrate boundary
DOI: 10.1088/1674-4926/35/3/034004
More Information
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Abstract
This study focuses on modeling the effects of deep hole traps, mainly the effect of the substrate (backgating effect) in a GaAs transistor MESFT. This effect is explained by the existence, at the interface, of a space charge zone. Any modulation in this area leads to response levels trapping the holes therein to the operating temperature. We subsequently developed a model treating the channel substrate interface as an N-P junction, allowing us to deduce the time dependence of the component parameters of the total resistance Rds, the pinch-off voltage VP, channel resistance, fully open Rco and the parasitic series resistance RS to bind the effect trap holes H1 and H0. When compared with the experimental results, the values of the RDS (tS) model for both traps show that there is an agreement between theory and experiment; it has inferred parameter traps, namely the density and the time constant of the trap. This means that a space charge region exists at the channel-substrate interface and that the properties can be approximated to an N-P junction.-
Keywords:
- traps,
- pinch-off voltage,
- resistance,
- channel substrate interface
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References
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