J. Semicond. > 2015, Volume 36 > Issue 7 > 075001
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SEMICONDUCTOR INTEGRATED CIRCUITS

A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor

Shuo Wang, Xinnian Zheng, Hao Yang and Haiying Zhang

+ Author Affiliations

 Corresponding author: Xinnian Zheng, E-mail: zhengxinnian@ime.ac.cn

DOI: 10.1088/1674-4926/36/7/075001

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Abstract: A two-stage monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) fabricated in 0.5 μm GaAs pHEMT is presented. The Miller effect introduced by the parasitic gate-drain capacitance is utilized to decrease the value of the input inductor. Additionally, the input on-chip inductor is a novel high Q gradual structure. The noise figure is reduced with these two methods. With good input and output matching, the LNA achieves a noise figure of 0.75 dB and a small signal gain of 32.7 dB over 698-806 MHz. The input 1 dB compression point is -21.8 dBm and the input third order interception point is -10 dBm.

Key words: LNA, pHEMT, Miller effect, gradual inductor



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Fig. 1.  The energy band structure of pHEMT.

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Fig. 2.  The small-signal equivalent circuit of common-source circuit with source degeneration inductor.

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Fig. 3.  The power supply of the test board.

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Fig. 4.  The schematic of LNA.

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Fig. 5.  The effect of drain parallel capacitor on $Z_{\rm d}$.

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Fig. 6.  The required $L_{\rm g}$ and $L_{\rm s}$ depending on $C_{\rm d}$.

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Fig. 7.  The noise figure depending on $C_{\rm d}$.

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Fig. 8.  The sketch map of the improved inductor.

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Fig. 9.  The inductance of the standard and optimized inductor.

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Fig. 10.  The $Q$-factor of the standard and optimized inductor.

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Fig. 11.  The noise figure of the LNA with the standard and optimized inductor.

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Fig. 12.  (a) The test PCB board. (b) The chip's micro-photograph.

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Fig. 13.  Comparison of the measured and simulated input reflection coefficient.

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Fig. 14.  Comparison of the measured and simulated output reflection coefficient.

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Fig. 15.  Comparison of the measured and simulated small signal gain and reverse isolation.

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Fig. 16.  Comparison of the measured and simulated noise figure.

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Table 1.   Comparison of different pHEMT transistors.

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Table 2.   Comparison with previous reports of LNAs.

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    Received: 22 December 2014 Revised: Online: Published: 01 July 2015

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      Article Navigation >  Journal of Semiconductors  > 2015  >  36(7): 075001
      Shuo Wang, Xinnian Zheng, Hao Yang, Haiying Zhang. A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor[J]. Journal of Semiconductors, 2015, 36(7): 075001. doi: 10.1088/1674-4926/36/7/075001 ****S Wang, X N Zheng, H Yang, H Y Zhang. A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor[J]. J. Semicond., 2015, 36(7): 075001. doi: 10.1088/1674-4926/36/7/075001.
      Citation:
      Shuo Wang, Xinnian Zheng, Hao Yang, Haiying Zhang. A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor[J]. Journal of Semiconductors, 2015, 36(7): 075001. doi: 10.1088/1674-4926/36/7/075001 ****
      S Wang, X N Zheng, H Yang, H Y Zhang. A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor[J]. J. Semicond., 2015, 36(7): 075001. doi: 10.1088/1674-4926/36/7/075001.
      shu

      A 0.75 dB NF LNA in GaAs pHEMT utilizing gate-drain capacitance and gradual inductor

      DOI: 10.1088/1674-4926/36/7/075001

      • Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China

      Funds:

      Project supported by the External Cooperation Program of BIC, Chinese Academy of Sciences (No. 172511KYSB20130108).

      More Information
      • Corresponding author: E-mail: zhengxinnian@ime.ac.cn
      • Received Date: 2014-12-22
      • Accepted Date: 2015-03-12
      • Published Date: 2015-01-25

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