Fig. 1.
Schematic diagram of SRAM cells. (a) 7T1M SRAM cell. (b) CMOS SRAM cell.
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| Citation: |
Patrick W. C. Ho, Haider Abbas F. Almurib, T. Nandha Kumar. Memristive SRAM cell of seven transistors and one memristor[J]. Journal of Semiconductors, 2016, 37(10): 104002. doi: 10.1088/1674-4926/37/10/104002
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P. W. C. Ho, H. A. F. Almurib, T. N. Kumar. Memristive SRAM cell of seven transistors and one memristor[J]. J. Semicond., 2016, 37(10): 104002. doi: 10.1088/1674-4926/37/10/104002.
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Memristive SRAM cell of seven transistors and one memristor
DOI: 10.1088/1674-4926/37/10/104002
More Information
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Abstract
In this work, a novel memristive SRAM cell is designed using seven transistors and one memristor (7T1M). In this 7T1M SRAM cell, the non-volatile functionality is achieved by adding a single memristor and a transistor to the design of a volatile SRAM cell. The designing of the 7T1M SRAM cell also introduces VCTRL which allows bidirectional current flowing through the memristor, instead of relying on complementary input sources which would require more design components. In this article, memristive SRAM cells available from the literature are simulated using the same simulation environment for a fair comparison. Simulations show that the 7T1M SRAM cell has the least power consumption against other memristive SRAM cells in the literature. The 7T1M SRAM cell operates with an average switching speed of 176.21 ns and an average power consumption of 2.9665 μW. The 7T1M SRAM cell has an energy-delay-area product value of 1.61, which is the lowest among the memristive SRAM cells available in the literature.-
Keywords:
- memristor,
- memristive SRAM cell,
- EDAP,
- non-volatile memory cell
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References
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