RESEARCH HIGHLIGHTS
Jinbo Chen, Jie Yang and Mohamad Sawan
Corresponding author: Jie Yang, yangjie@westlake.edu.cn; Mohamad Sawan, sawan@westlake.edu.cn
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Verhelst M, Bahai A. Where analog meets digital: Analog-to-information conversion and beyond. IEEE Solid-state circuits magazine, 2015, 7(3), 67 doi: 10.1109/MSSC.2015.2442394
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| [2] |
Chan C H, Cheng L, Deng W, et al. Trending IC design directions in 2022. J Semicond, 2022, 43(7), 071401 doi: 10.1088/1674-4926/43/7/071401
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| [3] |
Bankman D, Yang L, Moons B, et al. An Always-On 3.8 μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28-nm CMOS. IEEE Journal of Solid-State Circuits, 2018, 54(1), 158 doi: 10.1109/JSSC.2018.2869150
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| [4] |
Staszewski R B, Bashir I, Blokhina E, et al. Cryo-CMOS for quantum system on-chip integration: Quantum computing as the development driver. IEEE Solid-State Circuits Magazine, 2021, 13(2), 46-53 doi: 10.1109/MSSC.2021.3072807
|
| [5] |
Wu P C, Su J W, Hong L Y, et al. A 22nm 832Kb hybrid-domain floating-point SRAM in-memory-compute macro with 16.2-70.2 TFLOPS/W for high-accuracy AI-edge devices. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 126 doi: 10.1109/ISSCC42615.2023.10067527
|
| [6] |
Ali A M A, Dinc H, Bhoraskar P, et al. A 12-b 18-GS/s RF sampling ADC with an integrated wideband track-and-hold amplifier and background calibration. IEEE Journal of Solid-State Circuits, 2020, 55(12), 3210 doi: 10.1109/JSSC.2020.3023882
|
| [7] |
Sawan M, Yang J, Tarkhan M, et al. Emerging trends of biomedical circuits and systems. Boston: Now Publishers Inc. , 2021
|
| [8] |
Seol T, Lee S, Kim G, et al. A 1V 136.6 dB-DR 4kHz-BW ΔΣ current-to-cigital converter with a truncation-noise-shaped baseline-servo-loop in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 482 doi: 10.1109/ISSCC42615.2023.10067537
|
| [9] |
Kim G, Lee S, Seol T, et al. 32.4 A 1V-supply 1.85Vpp-input-range 1kHz-BW 181.9 dB-FOM DR 179.4 dB-FOM SNDR 2nd-order noise-shaping SAR-ADC with enhanced input impedance in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 484 doi: 10.1109/ISSCC42615.2023.10067844
|
| [10] |
Xu J, Sales Filho J, Nag S, et al. Fascicle-selective bidirectional peripheral nerve interface IC with 173dB FOM noise-shaping SAR ADCs and 1.38pJ/b frequency-multiplying current-ripple radio transmitter. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 31 doi: 10.1109/ISSCC42615.2023.10067626
|
| [11] |
C Mu, J P Zheng, C X Chen. Beyond convolutional neural networks computing: New trends on ISSCC 2023 machine learning chips. J Semicond, 2023, 44(5), 050203 doi: 10.1088/1674-4926/44/5/050203
|
| [12] |
Munger B, Wilcox K, Sniderman J, et al. “Zen 4”: The AMD 5nm 5.7 GHz x86-64 microprocessor core. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 38 doi: 10.1109/ISSCC42615.2023.10067540
|
| [13] |
Seong K, Park D, Bae G, et al. A 4nm 32Gb/s 8Tb/s/mm die-to-die chiplet using NRZ single-ended transceiver with equalization schemes and training techniques. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 114 doi: 10.1109/ISSCC42615.2023.10067477
|
| [14] |
Tu F, Wang Y, Wu Z, et al. 16.4 TensorCIM: A 28nm 3.7 nJ/Gather and 8.3 TFLOPS/W FP32 Digital-CIM tensor processor for MCM-CIM-based beyond-NN acceleration. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 254 doi: 10.1109/ISSCC42615.2023.10067285
|
| [1] |
Verhelst M, Bahai A. Where analog meets digital: Analog-to-information conversion and beyond. IEEE Solid-state circuits magazine, 2015, 7(3), 67 doi: 10.1109/MSSC.2015.2442394
|
| [2] |
Chan C H, Cheng L, Deng W, et al. Trending IC design directions in 2022. J Semicond, 2022, 43(7), 071401 doi: 10.1088/1674-4926/43/7/071401
|
| [3] |
Bankman D, Yang L, Moons B, et al. An Always-On 3.8 μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28-nm CMOS. IEEE Journal of Solid-State Circuits, 2018, 54(1), 158 doi: 10.1109/JSSC.2018.2869150
|
| [4] |
Staszewski R B, Bashir I, Blokhina E, et al. Cryo-CMOS for quantum system on-chip integration: Quantum computing as the development driver. IEEE Solid-State Circuits Magazine, 2021, 13(2), 46-53 doi: 10.1109/MSSC.2021.3072807
|
| [5] |
Wu P C, Su J W, Hong L Y, et al. A 22nm 832Kb hybrid-domain floating-point SRAM in-memory-compute macro with 16.2-70.2 TFLOPS/W for high-accuracy AI-edge devices. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 126 doi: 10.1109/ISSCC42615.2023.10067527
|
| [6] |
Ali A M A, Dinc H, Bhoraskar P, et al. A 12-b 18-GS/s RF sampling ADC with an integrated wideband track-and-hold amplifier and background calibration. IEEE Journal of Solid-State Circuits, 2020, 55(12), 3210 doi: 10.1109/JSSC.2020.3023882
|
| [7] |
Sawan M, Yang J, Tarkhan M, et al. Emerging trends of biomedical circuits and systems. Boston: Now Publishers Inc. , 2021
|
| [8] |
Seol T, Lee S, Kim G, et al. A 1V 136.6 dB-DR 4kHz-BW ΔΣ current-to-cigital converter with a truncation-noise-shaped baseline-servo-loop in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 482 doi: 10.1109/ISSCC42615.2023.10067537
|
| [9] |
Kim G, Lee S, Seol T, et al. 32.4 A 1V-supply 1.85Vpp-input-range 1kHz-BW 181.9 dB-FOM DR 179.4 dB-FOM SNDR 2nd-order noise-shaping SAR-ADC with enhanced input impedance in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 484 doi: 10.1109/ISSCC42615.2023.10067844
|
| [10] |
Xu J, Sales Filho J, Nag S, et al. Fascicle-selective bidirectional peripheral nerve interface IC with 173dB FOM noise-shaping SAR ADCs and 1.38pJ/b frequency-multiplying current-ripple radio transmitter. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 31 doi: 10.1109/ISSCC42615.2023.10067626
|
| [11] |
C Mu, J P Zheng, C X Chen. Beyond convolutional neural networks computing: New trends on ISSCC 2023 machine learning chips. J Semicond, 2023, 44(5), 050203 doi: 10.1088/1674-4926/44/5/050203
|
| [12] |
Munger B, Wilcox K, Sniderman J, et al. “Zen 4”: The AMD 5nm 5.7 GHz x86-64 microprocessor core. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 38 doi: 10.1109/ISSCC42615.2023.10067540
|
| [13] |
Seong K, Park D, Bae G, et al. A 4nm 32Gb/s 8Tb/s/mm die-to-die chiplet using NRZ single-ended transceiver with equalization schemes and training techniques. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 114 doi: 10.1109/ISSCC42615.2023.10067477
|
| [14] |
Tu F, Wang Y, Wu Z, et al. 16.4 TensorCIM: A 28nm 3.7 nJ/Gather and 8.3 TFLOPS/W FP32 Digital-CIM tensor processor for MCM-CIM-based beyond-NN acceleration. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 254 doi: 10.1109/ISSCC42615.2023.10067285
|
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Received: 25 April 2023 Revised: Online: Accepted Manuscript: 26 April 2023Uncorrected proof: 27 April 2023Corrected proof: 04 May 2023Published: 10 May 2023
| Citation: |
Jinbo Chen, Jie Yang, Mohamad Sawan. Emerging trends of integrated-mixed-signal chips in ISSCC 2023[J]. Journal of Semiconductors, 2023, 44(5): 050204. doi: 10.1088/1674-4926/44/5/050204
****
J B Chen, J Yang, M Sawan. Emerging trends of integrated-mixed-signal chips in ISSCC 2023[J]. J. Semicond, 2023, 44(5): 050204. doi: 10.1088/1674-4926/44/5/050204
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Jinbo Chen：received the B.S. degree in Electronic Information Engineering from Beihang University, Beijing, China in 2020. In August 2020, he joined the Center of Excellence in Biomedical Research on Advanced Integrated-on-chips Neurotechnologies (CenBRAIN Neurotech), Westlake University, where he is currently pursuing the Ph.D. degree. His research interests include closed-loop brain-machine interface SoC and emerging neuromorphic systems
Jie Yang：is a research associate professor at Westlake University School of Engineering. He received his B.S. degree from Tianjin University in 2010 and his Ph.D. degree from the Chinese Academy of Sciences in 2015. He worked as a post-doctoral fellow at the University of Calgary from 2015 to 2019 and joined CenBRAIN Neurotech at Westlake University in 2019. His current research interests include novel SoC for intelligent biomedical applications, brain-machine interface, energy-efficient AI algorithms and VLSI architecture. He has designed different types of image, video signal processing chips and image sensors chips under advanced technologies
Mohamad Sawan：Fellow of the Canadian Academy of Engineering, Fellow of the Engineering Institute of Canada, Fellow of the Royal Society of Sciences of Canada, Fellow of the IEEE, is an internationally renowned scientist in the field of smart medical devices. He has made significant contributions in implantable and wearable medical devices based on smart microsystems. Professor Sawan got a Ph.D. in Electrical Engineering from University of Sherbrooke in 1990, was a postdoc fellow in Biomedical Engineering in McGill University in 1991, and was assistant professor, associate professor and full professor from 1991 to 2018 in Polytechnique, the Engineering School of University of Montreal. He joined the School of Engineering of Westlake University as a Chair Professor in 2018, he is the Founder and Principle Investigator in the Center of Excellence in Biomedical Research on Advances-in-Chips Neurotechnologies (CenBRAIN Neurotech) in Westlake University| [1] |
Verhelst M, Bahai A. Where analog meets digital: Analog-to-information conversion and beyond. IEEE Solid-state circuits magazine, 2015, 7(3), 67 doi: 10.1109/MSSC.2015.2442394
|
| [2] |
Chan C H, Cheng L, Deng W, et al. Trending IC design directions in 2022. J Semicond, 2022, 43(7), 071401 doi: 10.1088/1674-4926/43/7/071401
|
| [3] |
Bankman D, Yang L, Moons B, et al. An Always-On 3.8 μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28-nm CMOS. IEEE Journal of Solid-State Circuits, 2018, 54(1), 158 doi: 10.1109/JSSC.2018.2869150
|
| [4] |
Staszewski R B, Bashir I, Blokhina E, et al. Cryo-CMOS for quantum system on-chip integration: Quantum computing as the development driver. IEEE Solid-State Circuits Magazine, 2021, 13(2), 46-53 doi: 10.1109/MSSC.2021.3072807
|
| [5] |
Wu P C, Su J W, Hong L Y, et al. A 22nm 832Kb hybrid-domain floating-point SRAM in-memory-compute macro with 16.2-70.2 TFLOPS/W for high-accuracy AI-edge devices. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 126 doi: 10.1109/ISSCC42615.2023.10067527
|
| [6] |
Ali A M A, Dinc H, Bhoraskar P, et al. A 12-b 18-GS/s RF sampling ADC with an integrated wideband track-and-hold amplifier and background calibration. IEEE Journal of Solid-State Circuits, 2020, 55(12), 3210 doi: 10.1109/JSSC.2020.3023882
|
| [7] |
Sawan M, Yang J, Tarkhan M, et al. Emerging trends of biomedical circuits and systems. Boston: Now Publishers Inc. , 2021
|
| [8] |
Seol T, Lee S, Kim G, et al. A 1V 136.6 dB-DR 4kHz-BW ΔΣ current-to-cigital converter with a truncation-noise-shaped baseline-servo-loop in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 482 doi: 10.1109/ISSCC42615.2023.10067537
|
| [9] |
Kim G, Lee S, Seol T, et al. 32.4 A 1V-supply 1.85Vpp-input-range 1kHz-BW 181.9 dB-FOM DR 179.4 dB-FOM SNDR 2nd-order noise-shaping SAR-ADC with enhanced input impedance in 0.18μm CMOS. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 484 doi: 10.1109/ISSCC42615.2023.10067844
|
| [10] |
Xu J, Sales Filho J, Nag S, et al. Fascicle-selective bidirectional peripheral nerve interface IC with 173dB FOM noise-shaping SAR ADCs and 1.38pJ/b frequency-multiplying current-ripple radio transmitter. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 31 doi: 10.1109/ISSCC42615.2023.10067626
|
| [11] |
C Mu, J P Zheng, C X Chen. Beyond convolutional neural networks computing: New trends on ISSCC 2023 machine learning chips. J Semicond, 2023, 44(5), 050203 doi: 10.1088/1674-4926/44/5/050203
|
| [12] |
Munger B, Wilcox K, Sniderman J, et al. “Zen 4”: The AMD 5nm 5.7 GHz x86-64 microprocessor core. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 38 doi: 10.1109/ISSCC42615.2023.10067540
|
| [13] |
Seong K, Park D, Bae G, et al. A 4nm 32Gb/s 8Tb/s/mm die-to-die chiplet using NRZ single-ended transceiver with equalization schemes and training techniques. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 114 doi: 10.1109/ISSCC42615.2023.10067477
|
| [14] |
Tu F, Wang Y, Wu Z, et al. 16.4 TensorCIM: A 28nm 3.7 nJ/Gather and 8.3 TFLOPS/W FP32 Digital-CIM tensor processor for MCM-CIM-based beyond-NN acceleration. 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, 254 doi: 10.1109/ISSCC42615.2023.10067285
|
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