Citation: |
Zhao Kai, Liu Zhongli, Yu Fang, Gao Jiantou, Xiao Zhiqiang, Hong Genshen. Radiation-Hardened 128kb PDSOI CMOS Static RAM[J]. Journal of Semiconductors, 2007, 28(7): 1139-1143.
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Zhao K, Liu Z L, Yu F, Gao J T, Xiao Z Q, Hong G S. Radiation-Hardened 128kb PDSOI CMOS Static RAM[J]. Chin. J. Semicond., 2007, 28(7): 1139.
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Radiation-Hardened 128kb PDSOI CMOS Static RAM
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Abstract
A radiation-hardened 128kbit asynchronous SRAM fabricated in partial depletion silicon on insulator substrate is presented.Special characteristics of SOI devices are used in the design process.After careful circuit design,hierarchical layout design,and simulation of critical path,the SRAM chip was fabricated in the first turn-out.Besides the radiation-hardened characteristics of SOI material,fully-body-tied 6T memory cell and H-type gate MOSFETs techniques are also implemented in this PDSOI SRAM.These advanced techniques reduce the power consumption and raise the radiation-hardened level of this SRAM.The final testing shows that the 128k bit SOI SRAM has a typical operating current of 20mA at 10MHz,total dose tolerance of 500krad(Si),and dose rate survivability of 2.45e11rad (Si)/s.The implementation of radiation-hardened 128k SOI SRAM will accelerate the development of PD SOI CMOS processes,and will surely contribute more to the radiation design of VLSI circuits in the future.-
Keywords:
- partial-depletion SOI,
- static RAM,
- radiation hardened design
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References
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