| Citation: |
Zhang Xun, Wang Peng, Jin Dongming. Sub-1V CMOS Voltage Reference Based on Weighted Vgs[J]. Journal of Semiconductors, 2006, 27(5): 774-777.
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Zhang X, Wang P, Jin D M. Sub-1V CMOS Voltage Reference Based on Weighted Vgs[J]. Chin. J. Semicond., 2006, 27(5): 774.
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Sub-1V CMOS Voltage Reference Based on Weighted Vgs
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Abstract
We propose a voltage reference based on the weighted difference between the gate-source voltages of an nMOS and a pMOS operating in their saturation regions.No diodes or parasitic bipolar transistors are used.The circuit is simulated and fabricated with SMIC 0.18μm mixed-signal technology,and our measurements demonstrate that its temperature coefficient is 44ppm/℃ and its PSRR is -46dB.It works well when Vdd is above 650mV.The active area of the circuit is about 0.05mm2 -
References
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