Chin. J. Semicond. > 2007, Volume 28 > Issue 11 > 1690-1695

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A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers

Dong Qiao, Geng Li and Shao Zhibiao

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Abstract: This paper presents a low-voltage low-power variable gain amplifier,which is applied in the automatic gain control loop of a super heterodyne receiver.Six stages are cascaded to provide an 81dB digitally controlled gain range in a 3dB step.The gain step error is less than 05dB.It operates at an intermediate frequency of 300kHz,and the power consumption is 1.35mW from a 1.8V supply.The prototype chip is implemented in a TSMC’s 0.18μm 1P6M CMOS process and occupies approximately 0.24mm2.It is very suitable for portable wireless communication systems.The measurement results agree well with the system requirements.

Key words: variable gain amplifierlow voltagelow powersuper heterodyne receiverCMOS RF integrated circuits

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    Received: 18 August 2015 Revised: 13 July 2007 Online: Published: 01 November 2007

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      Dong Qiao, Geng Li, Shao Zhibiao. A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers[J]. Journal of Semiconductors, 2007, 28(11): 1690-1695. ****Dong Q, Geng L, Shao Z B. A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers[J]. Chin. J. Semicond., 2007, 28(11): 1690.
      Citation:
      Dong Qiao, Geng Li, Shao Zhibiao. A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers[J]. Journal of Semiconductors, 2007, 28(11): 1690-1695. ****
      Dong Q, Geng L, Shao Z B. A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers[J]. Chin. J. Semicond., 2007, 28(11): 1690.

      A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers

      • Received Date: 2015-08-18
      • Accepted Date: 2007-03-27
      • Revised Date: 2007-07-13
      • Published Date: 2007-10-24

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