p-GaN HEMT current reference and current mirror for high temperature application

Pingyu Cao; Kepeng Zhao; Zhengxuan Li; Yihao Xu; Ping Zhang; Harm Van Zalinge; Miao Cui; Fei Xue

doi:10.1088/1674-4926/25070035

J. Semicond. > In Press

ARTICLES

p-GaN HEMT current reference and current mirror for high temperature application

Pingyu Cao^{1, 3}, Kepeng Zhao^{1, 3}, Zhengxuan Li^{1, 3}, Yihao Xu^{1, 3}, Ping Zhang², Harm Van Zalinge³, Miao Cui^{1, 3,} and Fei Xue^{1, 3,}

+ Author Affiliations

1. Department of Electrical and Electronic Engineering, Xi'an Jiaotong-Liverpool University, Suzhou 215123, China
2. Department of Communications and Networking, Xi'an Jiaotong-Liverpool University, Suzhou 215123, China
3. Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3GJ, U.K.

Author Bio:

Pingyu Cao received the B.S. degree from Southwest Minzu University in 2017, the M.S. degree from the University of New South Wales in 2020, and the Ph.D. degree from the University of Liverpool in 2025. His research interests include gallium nitride high-electron-mobility transistors (GaN HEMTs) and GaN-based integrated circuits.

Miao Cui received the M.S. degree from Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Science, Suzhou, China and Ph.D degree from the University of Liverpool. She is currently an assistant professor with Xi'an Jiaotong-Liverpool University, Suzhou, China. Her current research interests include GaN power devices and integrated circuits.

Fei Xue received the bachelor's and master's degrees in power system and its automation from Wuhan University, Wuhan, China, in 1999 and 2002, respectively, and the Ph.D. degree in electrical engineering from the Politecnico di Torino, Turin, Italy, 2009. He was the Deputy Chief Engineer of Beijing XJ Electric Company, Ltd., Beijing, China, and a Lead Research Scientist with Siemens Eco-City Innovation Technologies (Tianjin) Company, Ltd., Tianjin, China. He is currently a Senior Associate Professor and the Head of the Department of Electrical and Electronic Engineering, Xi'an Jiaotong–Liverpool University, Suzhou, China. His research interests include power system security, virtual microgrids, electric vehicles, and graph neural networks.

Corresponding author: Miao Cui, Miao.Cui02@xjtlu.edu.cn; Fei Xue, Fei.Xue@xjtlu.edu.cn

DOI: 10.1088/1674-4926/25070035CSTR: 32376.14.1674-4926.25070035

Abstract: This paper demonstrates a monolithically integrated current reference and current mirror based on p-GaN gate HEMT technology, designed for high-temperature applications. The p-GaN current reference is composed of one D-mode and two E-mode devices. The generated reference current is independent of supply voltage since the proposed circuit incorporates a bias circuit capable of providing a supply-voltage-insensitive bias voltage. Moreover, under the zero-temperature coefficient (ZTC) bias voltage condition, the variation in the generated reference current at 200 °C is reduced by 15.4%, compared to a conventional p-GaN current reference with a bias voltage of 5 V. Experimental results indicate that the generated reference current slightly reduced from 2.53 to 1.70 mA over a broad temperature range of 25−200 °C. In addition, a current mirror circuit based on p-GaN HEMT technology was designed to imitate a reference current. The influence of temperature on the output current of the current mirror is mitigated, which could be realised by biasing the gate-to-source voltage at the zero-temperature coefficient voltage. This design sustains the current mirror mismatch error with small variation across a temperature range from room temperature to 200 °C. These results indicate that the GaN current reference and current mirror under zero-temperature coefficient bias voltage can ensure stable output current across different temperatures, facilitating the application of fully GaN integrated circuits in high-temperature environments.

Key words: p-GaN HEMTs, current reference, current mirror, high-temperature application, supply voltage insensitivity, monolithic integration

References

[1]	Chen K J, Häberlen O, Lidow A, et al. GaN-on-Si power technology: Devices and applications. IEEE Trans Electron Devices, 2017, 64(3): 779 doi: 10.1109/TED.2017.2657579
[2]	Hu Y S, Wang Y G, Wang W, et al. 11. 2 W/mm power density AlGaN/GaN high electron-mobility transistors on a GaN substrate. J Semicond, 2024, 45(1): 012501
[3]	Sun R Z, Lai J X, Chen W J, et al. GaN power integration for high frequency and high efficiency power applications: A review. IEEE Access, 2020, 8: 15529 doi: 10.1109/ACCESS.2020.2967027
[4]	Hassan A, Savaria Y, Sawan M. GaN integration technology, an ideal candidate for high-temperature applications: A review. IEEE Access, 2018, 6: 78790 doi: 10.1109/ACCESS.2018.2885285
[5]	Nela L, Van Erp R, Perera N, et al. Impact of embedded liquid cooling on the electrical characteristics of GaN-on-Si power transistors. IEEE Electron Device Lett, 2021, 42(11): 1642 doi: 10.1109/LED.2021.3114056
[6]	Cao P Y, Zhao K P, Van Zalinge H, et al. AlGaN/GaN high electron mobility transistor amplifier for high-temperature operation. IEEE J Electron Devices Soc, 2024, 12: 981 doi: 10.1109/JEDS.2024.3486454
[7]	Zheng Z Y, Song W J, Zhang L, et al. Monolithically integrated GaN ring oscillator based on high-performance complementary logic inverters. IEEE Electron Device Lett, 2021, 42(1): 26 doi: 10.1109/LED.2020.3039264
[8]	Cui M, Sun R Z, Bu Q L, et al. Monolithic GaN half-bridge stages with integrated gate drivers for high temperature DC-DC buck converters. IEEE Access, 2019, 7: 184375 doi: 10.1109/ACCESS.2019.2958059
[9]	Cui M, Zhu Y H, Cao P Y, et al. A monolithic GaN driver with a deadtime generator (DTG) for high-temperature (HT) GaN DC-DC buck converters. IET Power Electron, 2023, 16(9): 1582 doi: 10.1049/pel2.12498
[10]	Shukla R, Ramirez-Angulo J, Lopez-Martin A, et al. A low voltage rail to rail V-I conversion scheme for applications in current mode A/D converters. 2004 IEEE International Symposium on Circuits and Systems (ISCAS), 2004: I doi: 10.1109/ISCAS.2004.1328345
[11]	Liu X S, Chen K J. GaN single-polarity power supply bootstrapped comparator for high-temperature electronics. IEEE Electron Device Lett, 2011, 32(1): 27 doi: 10.1109/LED.2010.2088376
[12]	Hoke W E, Chelakara R V, Bettencourt J P, et al. Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit. J Vac Sci Technol B, 2012, 30(2): 02B101 doi: 10.1116/1.3665220
[13]	Nguyen V S, Escoffier R, Catellani S, et al. Design, implementation and characterisation of an integrated current sensing in GaN HEMT device by using the current-mirroring technique. Proceedings of the EPE'22 ECCE Europe, 2022: 1
[14]	Cai Y C, Forsyth A J, Todd R. Impact of GaN HEMT dynamic on-state resistance on converter performance. 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, 1689 doi: 10.1109/APEC.2017.7930926
[15]	Wong K Y, Chen W J, Chen K J. Integrated voltage reference and comparator circuits for GaN smart power chip technology. 2009 21st International Symposium on Power Semiconductor Devices & IC’s, 2009: 57 doi: 10.1109/ISPSD.2009.5158000
[16]	Chang J, Yin Y L, Du J H, et al. On-chip integrated high-sensitivity temperature sensor based on p-GaN/AlGaN/GaN heterostructure. IEEE Electron Device Lett, 2023, 44(4): 594 doi: 10.1109/LED.2023.3244821
[17]	Stockman A, Canato E, Meneghini M, et al. Schottky gate induced threshold voltage instabilities in p-GaN gate AlGaN/GaN HEMTs. IEEE Trans Device Mater Reliab, 2021, 21(2): 169 doi: 10.1109/TDMR.2021.3080585
[18]	Li S, Liu S Y, Tian Y, et al. High-temperature electrical performances and physics-based analysis of p-GaN HEMT device. IET Power Electron, 2020, 13(3): 420 doi: 10.1049/iet-pel.2019.0510
[19]	Wang H, Lin Y, Jiang J S, et al. Investigation of thermally induced threshold voltage shift in normally-OFF p-GaN gate HEMTs. IEEE Trans Electron Devices, 2022, 69(5): 2287 doi: 10.1109/TED.2022.3157805
[20]	Tallarico A N, Stoffels S, Posthuma N, et al. Threshold voltage instability in GaN HEMTs with p-type gate: Mg doping compensation. IEEE Electron Device Lett, 2019, 40(4): 518 doi: 10.1109/LED.2019.2897911
[21]	Tan W S, Uren M J, Fry P W, et al. High temperature performance of AlGaN/GaN HEMTs on Si substrates. Solid State Electron, 2006, 50(3): 511 doi: 10.1016/j.sse.2006.02.008
[22]	Suria A J, Yalamarthy A S, So H, et al. DC characteristics of ALD-grown Al2O3/AlGaN/GaN MIS-HEMTs and HEMTs at 600 °C in air. Semicond Sci Technol, 2016, 31(11): 115017 doi: 10.1088/0268-1242/31/11/115017
[23]	Lee H, Ryu H, Kang J Z, et al. Stable high temperature operation of p-GaN gate HEMT with etch-stop layer. IEEE Electron Device Lett, 2024, 45(3): 312 doi: 10.1109/LED.2024.3352046
[24]	Li A, Shen Y, Li Z Q, et al. A monolithically integrated 2-transistor voltage reference with a wide temperature range based on AlGaN/GaN technology. IEEE Electron Device Lett, 2022, 43(3): 362 doi: 10.1109/LED.2022.3146263
[25]	Modolo N, Tang S W, Jiang H J, et al. A novel physics-based approach to analyze and model E-mode p-GaN power HEMTs. IEEE Trans Electron Devices, 2021, 68(4): 1489 doi: 10.1109/TED.2020.2992587
[26]	Bimbi C, Pennisi S, Privitera S, et al. Single-branch wide-swing-cascode subthreshold GaN monolithic voltage reference. Electronics, 2022, 11(12): 1840 doi: 10.3390/electronics11121840
[27]	Feng T R, Tanimoto H, Kamio T, et al. A reference current source with cascaded nagata current mirrors insensitive to supply voltage and temperature. 2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), 2022: 1 doi: 10.1109/ICSICT55466.2022.9963380
[28]	Kim T, Briant T, Han C, et al. A nano-ampere 2nd order temperature-compensated CMOS current reference using only single resistor for wide-temperature range applications. 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016: 510 doi: 10.1109/ISCAS.2016.7527289
[29]	Osipov D, Paul S. Compact first order temperature-compensated CMOS current reference. 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2018: 322 doi: 10.1109/ICECS.2017.8292086
[30]	Osipov D, Paul S. Temperature-compensated β-multiplier current reference circuit. IEEE Trans Circuits Syst II Express Briefs, 2017, 64(10): 1162 doi: 10.1109/tcsii.2016.2634779
[31]	Pritty, Jhamb M. Ultra low power current mirror design with enhanced bandwidth. Microelectron J, 2021, 113: 105063 doi: 10.1016/j.mejo.2021.105063
[32]	Xin Y J, Chen W J, Sun R Z, et al. Barrier lowering-induced capacitance increase of short-channel power p-GaN HEMTs at high temperature. IEEE Trans Electron Devices, 2022, 69(3): 1176 doi: 10.1109/TED.2021.3139561
[33]	Lisesivdin S B, Yildiz A, Balkan N, et al. Scattering analysis of two-dimensional electrons in AlGaN/GaN with bulk related parameters extracted by simple parallel conduction extraction method. J Appl Phys, 2010, 108: 013712 doi: 10.1063/1.3456008

Fig. 1. (Color online) Schematic of (a) E-mode p-GaN device, (b) D-mode device. (Device dimension: L_GS/W_G/L_G/L_GD = 5/100/5/5 µm).

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Fig. 2. (Color online) (a) AFM image of the etched region of the E-mode device. (b) Height of the etched profile.

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Fig. 3. (Color online) Transfer characteristics of the E/D mode p-GaN HEMTs.

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Fig. 4. (Color online) Output characteristics of the E/D mode p-GaN HEMTs.

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Fig. 5. (Color online) The I−V curve of E-mode p-GaN HEMTs at various temperatures (V_DS = 5 V).

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Fig. 6. (Color online) The circuit schematic of the proposed current reference.

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Fig. 7. (Color online) The circuit schematic of the proposed current mirror.

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Fig. 8. (Color online) The microphotograph of the proposed circuits of (a) current mirror, (b) current reference.

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Fig. 9. (Color online) The output voltage of the bias circuit at different temperatures.

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Fig. 10. (Color online) The generated current of the current reference (a) with a bias circuit, (b) without a bias circuit.

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Fig. 11. (Color online) The relationship between reference current and replicated current.

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Fig. 12. (Color online) The reference I₁ and replicated I₂ of a current mirror with ZTC bias voltage at (a) RT, (b) 200 °C. The current mirror with a bias voltage of 5 V at (c) RT, (d) 200 °C.

DownLoad: Full-Size Img PowerPoint

Table 1. Summary of different current reference circuits.

Parameter	This work	Ref. [27]	Ref. [28]	Ref. [29]	Ref. [30]
Technology	p-GaN	180 nm CMOS	130 nm CMOS	350 nm CMOS	350 nm CMOS
Device number	2	−	10	7	−
Supply voltage (V)	5	1.5	−	2.2−3.6	1.9
Reference current	2.53 mA@25 °C, 1.70 mA@200 °C	4 µA	27 nA	1.05 µA	16 µA
Temperature range (°C)	25−200	−45−95	−30−150	−40−120	0−110
Temperature coefficient (ppm/°C)	1989	180	327	143	105
Supply insensitivity	2.38 %/V	−	−	2.73 %/V	3.4−4.4 %/V

DownLoad: CSV

[1]	Chen K J, Häberlen O, Lidow A, et al. GaN-on-Si power technology: Devices and applications. IEEE Trans Electron Devices, 2017, 64(3): 779 doi: 10.1109/TED.2017.2657579
[2]	Hu Y S, Wang Y G, Wang W, et al. 11. 2 W/mm power density AlGaN/GaN high electron-mobility transistors on a GaN substrate. J Semicond, 2024, 45(1): 012501
[3]	Sun R Z, Lai J X, Chen W J, et al. GaN power integration for high frequency and high efficiency power applications: A review. IEEE Access, 2020, 8: 15529 doi: 10.1109/ACCESS.2020.2967027
[4]	Hassan A, Savaria Y, Sawan M. GaN integration technology, an ideal candidate for high-temperature applications: A review. IEEE Access, 2018, 6: 78790 doi: 10.1109/ACCESS.2018.2885285
[5]	Nela L, Van Erp R, Perera N, et al. Impact of embedded liquid cooling on the electrical characteristics of GaN-on-Si power transistors. IEEE Electron Device Lett, 2021, 42(11): 1642 doi: 10.1109/LED.2021.3114056
[6]	Cao P Y, Zhao K P, Van Zalinge H, et al. AlGaN/GaN high electron mobility transistor amplifier for high-temperature operation. IEEE J Electron Devices Soc, 2024, 12: 981 doi: 10.1109/JEDS.2024.3486454
[7]	Zheng Z Y, Song W J, Zhang L, et al. Monolithically integrated GaN ring oscillator based on high-performance complementary logic inverters. IEEE Electron Device Lett, 2021, 42(1): 26 doi: 10.1109/LED.2020.3039264
[8]	Cui M, Sun R Z, Bu Q L, et al. Monolithic GaN half-bridge stages with integrated gate drivers for high temperature DC-DC buck converters. IEEE Access, 2019, 7: 184375 doi: 10.1109/ACCESS.2019.2958059
[9]	Cui M, Zhu Y H, Cao P Y, et al. A monolithic GaN driver with a deadtime generator (DTG) for high-temperature (HT) GaN DC-DC buck converters. IET Power Electron, 2023, 16(9): 1582 doi: 10.1049/pel2.12498
[10]	Shukla R, Ramirez-Angulo J, Lopez-Martin A, et al. A low voltage rail to rail V-I conversion scheme for applications in current mode A/D converters. 2004 IEEE International Symposium on Circuits and Systems (ISCAS), 2004: I doi: 10.1109/ISCAS.2004.1328345
[11]	Liu X S, Chen K J. GaN single-polarity power supply bootstrapped comparator for high-temperature electronics. IEEE Electron Device Lett, 2011, 32(1): 27 doi: 10.1109/LED.2010.2088376
[12]	Hoke W E, Chelakara R V, Bettencourt J P, et al. Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit. J Vac Sci Technol B, 2012, 30(2): 02B101 doi: 10.1116/1.3665220
[13]	Nguyen V S, Escoffier R, Catellani S, et al. Design, implementation and characterisation of an integrated current sensing in GaN HEMT device by using the current-mirroring technique. Proceedings of the EPE'22 ECCE Europe, 2022: 1
[14]	Cai Y C, Forsyth A J, Todd R. Impact of GaN HEMT dynamic on-state resistance on converter performance. 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, 1689 doi: 10.1109/APEC.2017.7930926
[15]	Wong K Y, Chen W J, Chen K J. Integrated voltage reference and comparator circuits for GaN smart power chip technology. 2009 21st International Symposium on Power Semiconductor Devices & IC’s, 2009: 57 doi: 10.1109/ISPSD.2009.5158000
[16]	Chang J, Yin Y L, Du J H, et al. On-chip integrated high-sensitivity temperature sensor based on p-GaN/AlGaN/GaN heterostructure. IEEE Electron Device Lett, 2023, 44(4): 594 doi: 10.1109/LED.2023.3244821
[17]	Stockman A, Canato E, Meneghini M, et al. Schottky gate induced threshold voltage instabilities in p-GaN gate AlGaN/GaN HEMTs. IEEE Trans Device Mater Reliab, 2021, 21(2): 169 doi: 10.1109/TDMR.2021.3080585
[18]	Li S, Liu S Y, Tian Y, et al. High-temperature electrical performances and physics-based analysis of p-GaN HEMT device. IET Power Electron, 2020, 13(3): 420 doi: 10.1049/iet-pel.2019.0510
[19]	Wang H, Lin Y, Jiang J S, et al. Investigation of thermally induced threshold voltage shift in normally-OFF p-GaN gate HEMTs. IEEE Trans Electron Devices, 2022, 69(5): 2287 doi: 10.1109/TED.2022.3157805
[20]	Tallarico A N, Stoffels S, Posthuma N, et al. Threshold voltage instability in GaN HEMTs with p-type gate: Mg doping compensation. IEEE Electron Device Lett, 2019, 40(4): 518 doi: 10.1109/LED.2019.2897911
[21]	Tan W S, Uren M J, Fry P W, et al. High temperature performance of AlGaN/GaN HEMTs on Si substrates. Solid State Electron, 2006, 50(3): 511 doi: 10.1016/j.sse.2006.02.008
[22]	Suria A J, Yalamarthy A S, So H, et al. DC characteristics of ALD-grown Al2O3/AlGaN/GaN MIS-HEMTs and HEMTs at 600 °C in air. Semicond Sci Technol, 2016, 31(11): 115017 doi: 10.1088/0268-1242/31/11/115017
[23]	Lee H, Ryu H, Kang J Z, et al. Stable high temperature operation of p-GaN gate HEMT with etch-stop layer. IEEE Electron Device Lett, 2024, 45(3): 312 doi: 10.1109/LED.2024.3352046
[24]	Li A, Shen Y, Li Z Q, et al. A monolithically integrated 2-transistor voltage reference with a wide temperature range based on AlGaN/GaN technology. IEEE Electron Device Lett, 2022, 43(3): 362 doi: 10.1109/LED.2022.3146263
[25]	Modolo N, Tang S W, Jiang H J, et al. A novel physics-based approach to analyze and model E-mode p-GaN power HEMTs. IEEE Trans Electron Devices, 2021, 68(4): 1489 doi: 10.1109/TED.2020.2992587
[26]	Bimbi C, Pennisi S, Privitera S, et al. Single-branch wide-swing-cascode subthreshold GaN monolithic voltage reference. Electronics, 2022, 11(12): 1840 doi: 10.3390/electronics11121840
[27]	Feng T R, Tanimoto H, Kamio T, et al. A reference current source with cascaded nagata current mirrors insensitive to supply voltage and temperature. 2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), 2022: 1 doi: 10.1109/ICSICT55466.2022.9963380
[28]	Kim T, Briant T, Han C, et al. A nano-ampere 2nd order temperature-compensated CMOS current reference using only single resistor for wide-temperature range applications. 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016: 510 doi: 10.1109/ISCAS.2016.7527289
[29]	Osipov D, Paul S. Compact first order temperature-compensated CMOS current reference. 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2018: 322 doi: 10.1109/ICECS.2017.8292086
[30]	Osipov D, Paul S. Temperature-compensated β-multiplier current reference circuit. IEEE Trans Circuits Syst II Express Briefs, 2017, 64(10): 1162 doi: 10.1109/tcsii.2016.2634779
[31]	Pritty, Jhamb M. Ultra low power current mirror design with enhanced bandwidth. Microelectron J, 2021, 113: 105063 doi: 10.1016/j.mejo.2021.105063
[32]	Xin Y J, Chen W J, Sun R Z, et al. Barrier lowering-induced capacitance increase of short-channel power p-GaN HEMTs at high temperature. IEEE Trans Electron Devices, 2022, 69(3): 1176 doi: 10.1109/TED.2021.3139561
[33]	Lisesivdin S B, Yildiz A, Balkan N, et al. Scattering analysis of two-dimensional electrons in AlGaN/GaN with bulk related parameters extracted by simple parallel conduction extraction method. J Appl Phys, 2010, 108: 013712 doi: 10.1063/1.3456008

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Received: 24 July 2025 Revised: 11 December 2025 Online: Accepted Manuscript: 13 January 2026Uncorrected proof: 14 January 2026

Article Navigation > Journal of Semiconductors > 2026 > Uncorrected proof

Pingyu Cao, Kepeng Zhao, Zhengxuan Li, Yihao Xu, Ping Zhang, Harm Van Zalinge, Miao Cui, Fei Xue. p-GaN HEMT current reference and current mirror for high temperature application[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/25070035 ****P Y Cao, K P Zhao, Z X Li, Y H Xu, P Zhang, H V Zalinge, M Cui, and F Xue, p-GaN HEMT current reference and current mirror for high temperature application[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/25070035

Citation:

P Y Cao, K P Zhao, Z X Li, Y H Xu, P Zhang, H V Zalinge, M Cui, and F Xue, p-GaN HEMT current reference and current mirror for high temperature application[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/25070035

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p-GaN HEMT current reference and current mirror for high temperature application

DOI: 10.1088/1674-4926/25070035

CSTR: 32376.14.1674-4926.25070035

Pingyu Cao^{1, 3},
Kepeng Zhao^{1, 3},
Zhengxuan Li^{1, 3},
Yihao Xu^{1, 3},
Ping Zhang²,
Harm Van Zalinge³,
Miao Cui^{1, 3,},
Fei Xue^{1, 3,}

1.
Department of Electrical and Electronic Engineering, Xi'an Jiaotong-Liverpool University, Suzhou 215123, China
2.
Department of Communications and Networking, Xi'an Jiaotong-Liverpool University, Suzhou 215123, China
3.
Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool L69 3GJ, U.K.

More Information

Pingyu Cao received the B.S. degree from Southwest Minzu University in 2017, the M.S. degree from the University of New South Wales in 2020, and the Ph.D. degree from the University of Liverpool in 2025. His research interests include gallium nitride high-electron-mobility transistors (GaN HEMTs) and GaN-based integrated circuits
Miao Cui received the M.S. degree from Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Science, Suzhou, China and Ph.D degree from the University of Liverpool. She is currently an assistant professor with Xi'an Jiaotong-Liverpool University, Suzhou, China. Her current research interests include GaN power devices and integrated circuits
Fei Xue received the bachelor's and master's degrees in power system and its automation from Wuhan University, Wuhan, China, in 1999 and 2002, respectively, and the Ph.D. degree in electrical engineering from the Politecnico di Torino, Turin, Italy, 2009. He was the Deputy Chief Engineer of Beijing XJ Electric Company, Ltd., Beijing, China, and a Lead Research Scientist with Siemens Eco-City Innovation Technologies (Tianjin) Company, Ltd., Tianjin, China. He is currently a Senior Associate Professor and the Head of the Department of Electrical and Electronic Engineering, Xi'an Jiaotong–Liverpool University, Suzhou, China. His research interests include power system security, virtual microgrids, electric vehicles, and graph neural networks
Corresponding author: Miao.Cui02@xjtlu.edu.cn; Fei.Xue@xjtlu.edu.cn
Received Date: 2025-07-24
Revised Date: 2025-12-11

Available Online: 2026-01-13

Abstract

Abstract

This paper demonstrates a monolithically integrated current reference and current mirror based on p-GaN gate HEMT technology, designed for high-temperature applications. The p-GaN current reference is composed of one D-mode and two E-mode devices. The generated reference current is independent of supply voltage since the proposed circuit incorporates a bias circuit capable of providing a supply-voltage-insensitive bias voltage. Moreover, under the zero-temperature coefficient (ZTC) bias voltage condition, the variation in the generated reference current at 200 °C is reduced by 15.4%, compared to a conventional p-GaN current reference with a bias voltage of 5 V. Experimental results indicate that the generated reference current slightly reduced from 2.53 to 1.70 mA over a broad temperature range of 25−200 °C. In addition, a current mirror circuit based on p-GaN HEMT technology was designed to imitate a reference current. The influence of temperature on the output current of the current mirror is mitigated, which could be realised by biasing the gate-to-source voltage at the zero-temperature coefficient voltage. This design sustains the current mirror mismatch error with small variation across a temperature range from room temperature to 200 °C. These results indicate that the GaN current reference and current mirror under zero-temperature coefficient bias voltage can ensure stable output current across different temperatures, facilitating the application of fully GaN integrated circuits in high-temperature environments.
- p-GaN HEMTs,
- current reference,
- current mirror,
- high-temperature application,
- supply voltage insensitivity,
- monolithic integration

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