J. Semicond. > 2012, Volume 33 > Issue 10 > 105010

SEMICONDUCTOR INTEGRATED CIRCUITS

A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration

Zhang Yiwen, Chen Chixiao, Yu Bei, Ye Fan and Ren Junyan

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DOI: 10.1088/1674-4926/33/10/105010

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Abstract: Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters (TIADCs). A calibration method implemented in mixed circuits with low complexity and fast convergence is proposed in this paper. The algorithm for detecting sample-time error is based on correlation and widely applied to wide-sense stationary input signals. The detected sample-time error is corrected by a voltage-controlled sampling switch. The experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise and distortion ratio improves by 19.1 dB, and the spurious-free dynamic range improves by 34.6 dB for a 70.12-MHz input after calibration. The calibration convergence time is about 20000 sampling intervals.

Key words: sample-time error

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    Zhang Yiwen, Chen Chixiao, Yu Bei, Ye Fan, Ren Junyan. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. Journal of Semiconductors, 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010
    Zhang Y W, Chen C X, Yu B, Ye F, Ren J Y. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. J. Semicond., 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010.
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    Received: 20 August 2015 Revised: 21 April 2012 Online: Published: 01 October 2012

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      Zhang Yiwen, Chen Chixiao, Yu Bei, Ye Fan, Ren Junyan. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. Journal of Semiconductors, 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010 ****Zhang Y W, Chen C X, Yu B, Ye F, Ren J Y. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. J. Semicond., 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010.
      Citation:
      Zhang Yiwen, Chen Chixiao, Yu Bei, Ye Fan, Ren Junyan. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. Journal of Semiconductors, 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010 ****
      Zhang Y W, Chen C X, Yu B, Ye F, Ren J Y. A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration[J]. J. Semicond., 2012, 33(10): 105010. doi: 10.1088/1674-4926/33/10/105010.

      A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration

      DOI: 10.1088/1674-4926/33/10/105010
      Funds:

      Special Research Funds for Doctoral Program of Higher Education of China

      The National Natural Science Foundation of China (General Program, Key Program, Major Research Plan)

      • Received Date: 2015-08-20
      • Accepted Date: 2012-03-14
      • Revised Date: 2012-04-21
      • Published Date: 2012-09-10

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