Fig. 1.
The high-level architecture of the ATS core.
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Heng Yao, Haifang Jian, Liguo Zhou, Yin Shi. VLSI implementation of MIMO detection for 802.11n using a novel adaptive tree search algorithm[J]. Journal of Semiconductors, 2013, 34(10): 105005. doi: 10.1088/1674-4926/34/10/105005
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H Yao, H F Jian, L G Zhou, Y Shi. VLSI implementation of MIMO detection for 802.11n using a novel adaptive tree search algorithm[J]. J. Semicond., 2013, 34(10): 105005. doi: 10.1088/1674-4926/34/10/105005.
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VLSI implementation of MIMO detection for 802.11n using a novel adaptive tree search algorithm
DOI: 10.1088/1674-4926/34/10/105005
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Abstract
A 4×4 64-QAM multiple-input multiple-output (MIMO) detector is presented for the application of an IEEE 802.11n wireless local area network. The detector is the implementation of a novel adaptive tree search (ATS) algorithm, and multiple ATS cores need to be instantiated to achieve the wideband requirement in the 802.11n standard. Both the ATS algorithm and the architectural considerations are explained. The latency of the detector is 0.75 μs, and the detector has a gate count of 848 k with a total of 19 parallel ATS cores. Each ATS core runs at 67 MHz. Measurement results show that compared with the floating-point ATS algorithm, the fixed-point implementation achieves a loss of 0.9 dB at a BER of 10-3. -
References
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