Fig. 1.
Designed PC corner structures. Block is poly (PC), gray is active (RX), 113 is the minimum space between PC and RX. Both of the structures have 10 devices in parallel
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| Citation: |
Wei Sun, Dake Yang. The corner rounding modeling technique in SPICE simulations for deeply scaled MOSFETs[J]. Journal of Semiconductors, 2013, 34(11): 114008. doi: 10.1088/1674-4926/34/11/114008
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W Sun, D K Yang. The corner rounding modeling technique in SPICE simulations for deeply scaled MOSFETs[J]. J. Semicond., 2013, 34(11): 114008. doi: 10.1088/1674-4926/34/11/114008.
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The corner rounding modeling technique in SPICE simulations for deeply scaled MOSFETs
DOI: 10.1088/1674-4926/34/11/114008
More Information
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Abstract
This paper presents a novel poly (PC) and active (RX) corner rounding modeling approach to SPICE simulations. A set of specially designed structures was used for measurement data collection. PC and RX corner rounding equations have been derived based on an assumption that the corner rounding area is a fragment of a circle. The equations were modified to reflect the gouging effect of physical silicon wafers. The modified general equations were implemented in the SPICE model to enable the model to describe the corner rounding effect. The good fittings between the SPICE model simulation results and the silicon data demonstrated in this paper proved that the designed corner rounding model is practical and accurate.-
Keywords:
- SPICE model,
- MOSFETs,
- poly and active,
- corner rounding,
- nanometer technology
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References
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