1. Introduction

The wide unlicensed frequency band around 60 GHz, which enables short communication with high speed, attracts a lot of attention. A good application of the 60 GHz band is wireless local area networks with up to 1.5 Gbps rates. Due to the high speed, the transfer of high-definition video is enabled.

Generally, traditional antennas, such as horn antenna, are adopted for their high performance at the mm-wave frequency. However, the wave length in the 60 GHz band is several millimeters making it possible to integrate antenna onto chip or in a package. As a result, the low cost of integrated technology drives the research of the 60 GHz antenna to be shifting from conventional discrete designs to antenna-on-chip (AoC) and antenna-in-package (AiP) solutions in which the high gain was achieved by antenna array. An overview on the design of AoC and AiP was given before, the silicon substrate's high permittivity and low resistivity affect on the AoC efficiency, while AiP could have a much better efficiency^[1]. In order to improve the efficiency of the AoC, a lot of methods have been undertaken, such as using high-resistivity poly silicon substrate technology to decrease the loss of substrate^[2], elevating the patch in the air with MEMS technology^[3]. All the solutions could make good results, however, they are not compatible with standard CMOS technology and the antenna covers a large area, both of which could lead to failure in industry. As a result of poor efficiency on AoC more attention shifts to the AiP. A 60-GHz patch 4 $\times$ 4 arrays on low-temperature co-fired ceramic (LTCC) was presented in Ref. [4] with gain of 18.2 dBi. A slot antenna implemented in a thin cavity-down ceramic ball grid array (CBGA) package in LTCC technology was reported in Ref. [5] with a peak gain of 9.5 dBi at 61.5 GHz, and many kinds of antennas were reported in Refs. [5-8]. All the antennas above were fabricated based on the substrate design technology, for example in Ref. [5], several layers of LTCC were designed and then all the layers bonded to be an antenna. Additionally, the LTCC design rules restrict the design precision, usually below 0.1 mm. In this paper, we report a planar array fabricated on the Schott Borofloat substrate, a kind of glass, with standard CMOS technology for highly integrated 60 GHz radios. There is no need to do any design on the substrate itself and the design precision, as well as cost, could be much better than design's on LTCC while the performance is similar. The design could be used as an element of phase array for five meters communication.

2. Half-wave dipole antenna on Schott Borofloat

The best choice of the element for the antenna array is dipole due to its smart structure and the peak gain would be affected by the distance between the two elements of dipole. In the standard CMOS technology, one metal layer, connected to the ground, is often used to generate the image of the radiation source on another layer to make up dipole radiation. This is a vertical structure for the dipole direction perpendicular to the substrate plane. However, the distance between the two metal layers in standard CMOS technology is usually restricted to below 20 $\mu$m. As a result, the peak gain is far away from expected. Generally, for a single dipole, it will be no higher than 0 dBi.

Considering the restriction of the two metal layers, we turned to use a horizontal structure in which the dipole direction parallels with the substrate plane. The horizontal structure adopted in the design is a half-wave dipole antenna. The basic half-wave dipole element is similar to the traditional. The section plane and the plan form of the dipole are shown in Fig. 1. Schott Borofloat, one kind of glass, is chosen as a substrate for its high resistivity, low loss tangent and the convenience of carrying out CMOS technology on it. The antenna is designed with metal 2 on Schott Borofloat of which its electrical properties are shown in Table 1. The thickness of the substrate is 300 $\mu$m and the size is 7.5 $\times$ 6.5 mm$^{2}$ with the antenna in the middle. There will be a metal layer called metal1, which is used for fed-line layout in the array design, in the polyamide layer. To avoid confusing, metal 1 does not display in the section plane of Fig. 1.

The thickness of both of the two metal layers is 3 mm. Polyamide of 3 mm thickness is used to separate different metal layers. Totally, the thickness of polyamide below the metal 2 layer is 6 $\mu$m. In this structure, wave length alters in different directions. In the $z+$ direction, the wavelength is dependent on the air dielectric constant while in the $z-$ direction, the wavelength is dependent on the dielectric below the dipole including the substrate, the polyamide and the air. In any directions of the $xy$ plane, the wavelength depends on the effective dielectric constant. Because the substrate thickness is much smaller than the wavelength in itself, the second wavelength mainly depends on the air dielectric constant, similar to the first. The half-wave dipole is designed based on the last wavelength which, acquired by EM simulation, is 3 mm. In order to match the resonant frequency to 61 GHz, the dipole length is adjusted to 1.34 mm, a little shorter than half of the wavelength. As a result, the radiation in the $z$ direction is weakened a lot, which leads to the peak gain increase, but less than twice of the original gain.

The simulation result shown in Fig. 2 matches the conclusion very well. The original peak gain of the half-wave dipole antenna is about 2.2 dBi, while the peak gain of the designed dipole is 4 dBi. The peak gain direction is the $y$-axis while the radiation in the $z$-axis direction is weakened. All the EM simulation in this design is done by Ansoft-HFSSv12.

3. Antenna array

To access five meters of communication, the combined antenna gain is required to be 27 dBi at least for the line-of sight (LOS) path taking quadrature phase shift keying (QPSK)^[1] or 13.5 dBi for the transmission and receiving of antennas on average. Obviously, the antenna array should be adopted to improve the directivity of the antenna so as to increase the gain of the antenna. However, good directivity would cause the inconvenience while using and phase array technology should be used to solve the problem. To acquire the requested gain, a phase array of 16 elements, of which the gain could reach 16 dBi based on the dipole designed above, along with 16 power amplifiers are needed. To save the area on silicon, a 2 $\times$ 2 array was designed here to be the element of phase array.

First, the antenna is fed by parallel differential lines while the feed-line acts as a quarter wavelength impedance transformer. The input impedance is transformed to 200 $\Omega$ at 61 G$\Omega$. And then two groups of parallel differential lines transfer to the CPW fed-line of half wavelength, resulting in the input impedance being 100 $\Omega$. The same goes for the other two groups of antennas, at last a 2 $\times$ 2 array with 50 $\Omega$ input impedance is achieved as shown in Fig. 3. The structure size is shown in Table 2.

In order to strengthen the radiation of the $y$-axis, the fed phase of elements along the $y$-axis should be opposite and the fed phase of elements along the $x$-axis should be the same. So there are 2 crossings in the arrays and they are achieved with metal 1. The $S$-parameter of the matching network, one port input and 4-port output, is shown in Fig. 4. The magnitude of $S_{21}$, $S_{31}$, $S_{41}$, $S_{51}$ is around $-6$ dB, which is expected. The phase of $S_{21}$ is the same with $S_{51}$, elements along the $x$-axis. The phase of elements along the $y$-axis, $S_{21}$ and $S_{31}$, is opposite, strengthening the radiation of the $y$-axis. For a 2 $\times$ 2 array, the peak gain could be four times the arrays element's, that is 6 dBi larger than original. The simulation result in Fig. 5 reports a peak gain of 9.4 dBi, matching the conclusion very well. Comparison with designs in references is displayed in Table 3. From the table, we see that the design in this paper has similar performance with others when considering the area to be the same. Acceptable impedance bandwidth ($<$ -10 dB) from 58 to 63 GHz is achieved as shown in Fig. 6. All the EM simulations in this design are done by Ansoft-HFSSv12.

4. Measurements

The $S$-parameter measurements were carried out with Agilent Technologies E8361A. A photograph of the array is shown in Fig. 7. Figure 8 shows a comparison of the simulated and measured results of the input return losses of the 2 $\times$ 2 array. The $-10$ dB bandwidth of the antenna array is 4 GHz from 58.5 to 62.5 GHz and a $-27$ dB value at resonance frequency of 60.2 GHz. The measurement result agrees well with the simu-lation result.

5. Conclusion

We have designed and fabricated a 2 $\times$ 2 array with a similar performance to designs on LTCC using standard CMOS technology on a new substrate material, Schott Borofloat. The array has a measured 10-dB impedance bandwidth from 58.5 to 62.5 GHz and a simulated peak gain of 9.4 dBi, indicating a practical solution to the requested antenna. Compared to design on LTCC, the design precision, as well as cost, could be much better while maintaining similar performance. Schott Borofloat is a promising good candidate for substrate of mm-wave integrated antenna in a package.