Fig. 1.
Schematic cross section of CL T-LDMOS.
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| Citation: |
Qiuming Zhao, Qi Li, Ning Tang, Yongchang Li. A high-voltage SOI MOSFET with a compensation layer on the trenched buried oxide layer[J]. Journal of Semiconductors, 2013, 34(3): 034003. doi: 10.1088/1674-4926/34/3/034003
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Q M Zhao, Q Li, N Tang, Y C Li. A high-voltage SOI MOSFET with a compensation layer on the trenched buried oxide layer[J]. J. Semicond., 2013, 34(3): 034003. doi: 10.1088/1674-4926/34/3/034003.
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A high-voltage SOI MOSFET with a compensation layer on the trenched buried oxide layer
DOI: 10.1088/1674-4926/34/3/034003
More Information
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Abstract
A new silicon-on-insulator (SOI) high-voltage MOSFET structure with a compensation layer on the trenched buried oxide layer (CL T-LDMOS) is proposed. The high density inverse interface charges at the top surface of the buried oxide layer (BOX) enhance the electric field in the BOX and a uniform surface electric field profile is obtained, which results in the enhancement of the breakdown voltage (BV). The compensation layer can provide additional P-type charges, and the optimal drift region concentration is increased in order to satisfy the reduced surface electric field (RESURF) condition. The numerical simulation results indicate that the vertical electric field in the BOX increases to 6 MV/cm and the BV of the proposed device increases by 300% in comparison to a conventional SOI LDMOS, while maintaining low on-resistance. -
References
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