College of Microelectronics and Solid State Electronics, University of Electronic Science and Technology of China, Chengdu 610051, ChinaCollege of Microelectronics and Solid State Electronics, University of Electronic Science and Technology of China, Chengdu 610051, China
Abstract: A novel silicon-on-insulator (SOI) MOSFET with a variable low-k dielectric trench (LDT MOSFET) is proposed and its performance and characteristics are investigated. The trench in the drift region between drain and source is filled with low-k dielectric to extend the effective drift region. At OFF state, the low-k dielectric trench (LDT) can sustain high voltage and enhance the dielectric field due to the accumulation of ionized charges. At the same time, the vertical dielectric field in the buried oxide can also be enhanced by these ionized charges. Additionally, ON-state analysis of LDT MOSFET demonstrates excellent forward characteristics, such as low gate-to-drain charge density ( < 0.6 nC/mm2) and a robust safe operating area (0-84 V).
Because of its large optical absorption coefficient, a direct band gap (0.85 eV), abundance, and environmentally friendly element resources, semiconducting beta-phase iron disilicide (β-FeSi2) is useful for energy devices such as solar cells, photovoltaic devices, and thermoelectric devices[1-6]. A theoretical energy conversion efficiency of 16%-23% is predicted for β-FeSi2 solar cells[7, 8]. However, to date, there have been limited reports on solar cells fabricated using β-FeSi2, and the highest efficiency reported is 3.7% obtained on a crystalline β-FeSi2 film epitaxially grown on Si substrate[9]. However, this conversion efficiency is still too low to be practical because of the high reflectance from the β-FeSi2/Si interfacial layer. Therefore, the microstructure of the β-FeSi2/Si interface needs to be modified in order to enhance the photovoltaic performance. For example, to enhance trapping light efficiency, the traditional silicon substrates are replaced by textured ones to modify the interfacial structure. In addition, the photovoltaic characteristics can also be improved significantly by adding some Al atoms into the β-FeSi2/Si (100) interface regions[10]. Many reports imply that the β-FeSi2/Si interface is mainly responsible for the optical properties[11-15], but the intrinsic physical mechanism is not well clarified. As we all know, the optical absorption originates from the electronic transition between the conduction band (CB) and valence band (VB), therefore this becomes an important physical problem to clearly display the β-FeSi2/Si interface's electronic and optical absorption behavior.
Many calculations reveal that the optical absorption edge can be tuned by applied high pressure, especial for β-FeSi2 films structures. However, the effect of high pressure on the β-FeSi2/Si interface optical absorption behavior is rarely reported, due to its structure complexity. For example, when a β-FeSi2 film is deposited onto Si epitaxially, the diffusion rates of Fe and Si strongly depend on the preparation methods and, hence, the stoichiometry of the β-FeSi2/Si interface cannot be well controlled; some Si atoms are absent at the interfacial region, and this makes the lattice mismatch further increase[16, 17]. For β-FeSi2/Si interfacial structures, applied high pressure even effectively adjusts the lattice deformation extent systematically, and novel optical absorption behavior may occur. Therefore, a systematic investigation of the optical behavior and electronic structure of a β-FeSi2/Si interface with some Si vacancies at high pressure becomes an urgent objective. In this work, we theoretically display the behaviors of the optical absorption and electronic structures of the β-FeSi2/Si interface with some Si vacancies at different pressure.
2.
The model and calculation method
The heteroepitaxial system consisting of the β-FeSi2 (100)/Si (001) interfacial structure with some Si vacancies are simulated. The calculation is based on the density functional theory (DFT) in generalized gradient approximation (GGA) and Perdew-Burke-Ernzerhof (PBE) exchange-correlation potential, using the CASTEP package with Norm-conserving pseudopotentials[18, 19]. An energy cutoff of 500 eV is used to expand the plane wave functions. The Fe 3d64s2 orbitals and Si 3s23p2 orbitals are treated as valence states. The β-FeSi2 (100)/Si(001) interfacial layer is considered to comprise twelve layers of β-FeSi2 (100) and a Si (001) slabs, as shown in Fig. 1(a) and it has been verified to be well converged. The bottom two layers are fixed to mimic the bulk structure, and relaxation is performed until the following convergence tolerances are reached: 1 × 10−5 eV for energy, 0.03 eV/Å for maximum force, and 0.001 Å for maximum displacement. An external stress is applied by equivalent hydrostatic pressure and the optical properties are calculated based on the independent-particle approximation. The imaginary part of the dielectric function due to transitions between the occupied and unoccupied electronic states is given by the Fermi golden rule[20],
Figure
1.
(Color online) (a) Atomic configuration in the β-FeSi2 (100)/Si (001) model. The interfacial layer is marked by the red dashed line, the crystal orientations are marked by arrows, and gray and yellow balls represent Fe and Si atoms, respectively. The isosurfaces for electronic orbital of the highest occupied state and lowest unoccupied state of β-FeSi2 (100)/Si (001) interface with one Si atom absence at pressure P = 0 GPa are displayed in Figs. 1(b) and 1(c), respectively. The electronic density of the β-FeSi2 (100)/Si (001) interface with one Si atom absence is displayed in Fig. 1(d)
where Ω is the slab unit-cell volume, ℏω is the photon energy, k is the Bloch wave vector, Ec(v)k and |ψc(v)k(r)⟩ are the eigen-energy and wave function, where the superscripts c and v denote the states in the CB and the VB, respectively, r is the position vector, and u is the unit vector along the light polarization. We define the optical gaps as the energy at which the oscillator strength reaches 0.1% of the oscillator strength integrated from 0 to 1 eV. Although the DFT in the GGA is well known to underestimate band gaps, as our calculated band gap of 0.787 eV of bulk FeSi2 is much less than the experimental values of 0.875 eV, the trend of changing optical absorption behavior with applied pressure is reliable.
3.
Results and discussion
At pressure P = 0 GPa, the calculated photoabsorption and dielectric function imaginary part [Im ε] of the β-FeSi2 (100)/Si (001) interface structure containing different Si absences [positions V1 and V2, respectively marked by black circles in Fig. 1(a)] and without vacancies at are calculated and shown in Figs. 2(a) and 2(b), respectively. In the presence of Si vacancies (V1 and V2), the photoabsorption peaks are similar and without obvious difference, which imply that different Si vacancy positions at the interface layer cannot affect their optical behavior. Compared with the results of no vacancy, the Fe-Si bonds at the interface are enlarged form 3.429 to 3.463 Å, this leads to band gap and electronic structure changes[14]. Therefore, the up-shifts of photoabsorption peaks can be attributed to enlarged lattice distortion induced by Si vacancy addition. From the imaginary part of the dielectric function calculated results, we can obtain a similar physical phenomenon, which must be related with the internal electronic structure. Those results indicate that the existence of Si vacancies can affect the stress force imposed on the interface structure, but cannot directly affect the electronic transition between the CB and the VB, therefore the Fe atom state at the interfacial region is considered for this optical behavior.
Figure
2.
(a) Calculated photoabsorption spectra of the β-FeSi2 (100)/Si (001) interface with different Si vacancies at pressure $P =$ 0 GPa. (b) Calculated imaginary part of the dielectric function [Im ε] of the β-FeSi2 (100)/Si (001) interface with different Si vacancies at pressure $P =$ 0 GPa
To further confirm our conjectures, we examine the distribution of the electronic states at the VB and CB by orbital analysis. As pressure changes, the electronic orbital distributions are only slightly affected, but main features are very similar. As a typical characteristic, we display the electronic orbital analysis of the highest occupied states and lowest unoccupied states of the β-FeSi2 (100)/Si (001) interface with Si absence at pressure P = 2 GPa, in Figs. 1(b) and 1(c), respectively. This result obviously discloses that the electronic states are mainly dispersed in the regions of the interfacial Fe atom orbital, but slightly located at the internal Fe and Si atom orbital, which implies that the absence of some Si atoms in the interface cannot affect effectively the optical absorption and electronic transition. To further display electronic distribution behavior, the electronic density is also shown in Fig. 1(d), which also reveals that Fe atoms can tightly bind most electrons. After consideration about electronic structure, we can know that two β-FeSi2 atomic layers in the interfacial region should be mainly responsible for its optical absorption and dielectric function changes. Therefore, we can assume that the lattice distortion at interface as a result of a higher pressure can affect the optical behavior.
The photoabsorption spectra of β-FeSi2 (100)/Si (001) interface with Si vacancy (V1) at pressure P = 0, 1, 2, 3, 4 GPa are calculated and shown in Fig. 3(a). The calculated results show that the photoabsorption peak downshifts sharply to 0.26 eV from 0.21 eV with pressure increase to P = 2 GPa, and then begins to up-shift slowly to 0.35 eV for P = 4 GPa. From the definition of the imaginary part of the dielectric function, we can obtain the electronic transition feature between the lowest occupied and highest unoccupied electronic states. To clarify the photoabsorption physical origin, the imaginary parts of the dielectric function are also displayed in Fig. 3(b). Comparing to the results of photoabsorption, the similar changing features are displayed, which disclose that the lowest occupied and highest unoccupied electronic states are also affected by applied pressure; this may be a real physical reason for their optical behavior. From above analysis, the two interfacial layer atoms deformation as increasing pressure will be responsible for their optical behavior. Then we calculated the elastic constant (C44) for β-FeSi2 and Si, they are 127.1 GPa and 80.31 GPa, respectively. Therefore, the deformation difference as pressure increases will becomes obviously different, especially for interfacial regions with larger lattice mismatch[21]. So this physical process can be clearly displayed. As the pressure increases, the lengths of the Fe-Si bands at interfacial layers are decreased linearly form 2.297 Å (P = 0 GPa) to 2.288 Å (P = 1 GPa), 2.275 Å (P = 2 GPa), 2.273 Å (P = 3 GPa) and 2.269 Å (P = 4 GPa), and the lengths of the Fe-Si bands at internal region are also decreased linearly form 2.385 Å (P = 0 GPa) to 2.379 Å (P = 1 GPa), 2.375 Å (P = 2 GPa), 2.371 Å (P = 3 GPa) and 2.366 Å (P = 4 GPa). However, the difference in values between the interfacial and internal regions initially reaches a maximum 0.100 Å at P = 2 GPa and then decreases gradually to 0.097 Å at P = 4 GPa, which can partially offset the pressure exerted onto the β -FeSi2 (100) slab. This process will lead the absorption peak to down-shift firstly. As the pressure is further increased, the compressed Si (001) slab cannot offset effectively the applied pressure and consequently, the bond length difference decreases slowly. This special transformation in the interfacial region causes the electronic state distributions and electronic transition energy to change. And then the absorption peak slowly up-shifts. This explains why the β -FeSi2 (100)/Si (001) interface exhibits significantly different optical behavior and our study discloses that this phenomenon can be attributed to the deformation caused by different pressure. This behavior is obviously different from β-FeSi2 bulk materials. With increasing pressure, the optical gaps (Eg) of β -FeSi2 bulk materials are lineally enlarged: Eg = 0.78 eV (P = 0 GPa), 0.80 eV (P = 1 GPa), 0.81 eV (P = 2 GPa), 0.83 eV (P = 3 GPa), 0.85 eV (P = 4 GPa).
Figure
3.
(a) Calculated photoabsorption spectra of the β-FeSi2 (100)/Si (001) interface with a Si vacancy at pressure $P =$ 0, 1, 2, 3, 4 GPa. (b) Calculated imaginary part of the dielectric function [Im ε] of β-FeSi2 (100)/Si (001) interface with Si vacancy at pressure $P =$ 0, 1, 2, 3, 4 GPa
In summary, as pressure increases, the absorption spectra theoretically derived from the β-FeSi2 (100)/Si (001) slab indicate that the optical absorption peaks decrease initially, reach a minimum, and then increase gradually. Electronic structural analysis discloses that the Si (001) slab partially offsets the pressure exerted onto the β-FeSi2 (100) surface, and so the lengths of the Fe-Si and Si-Si bonds at the interface are larger than those in the internal region due to lattice mismatch itself, which is equivalent to strain applied to the interfacial region. As the pressure increases further, the compressed structure cannot offset effectively the high pressure, and then the absorption peak increases linearly with increasing pressure. This work discloses that pressure can play an important role in optical absorption behavior.
References
[1]
Luo X, Zhang B, Li Z, et al. A novel 700-V SOI LDMOS with double-sided trench. IEEE Electron Device Lett, 2007, 28:422 doi: 10.1109/LED.2007.894648
[2]
Luo X R, Yao G L, Chen X, et al. Ultra-low on-resistance high voltage (> 600 V) SOI MOSFET with a reduced cell pitch. Chin Phys B, 2011, 20(2):028501 doi: 10.1088/1674-1056/20/2/028501
[3]
Ren M, Li Z H, Liu X L, et al. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands. Chin Phys B, 2011, 20(12):128501 doi: 10.1088/1674-1056/20/12/128501
[4]
Wang C L, Sun J. An oxide filled extended trench gate super junction MOSFET structure. Chin Phys B, 2009, 18(3):1231 doi: 10.1088/1674-1056/18/3/065
[5]
Luo Xiaorong, Zhang Wei, Gu Jingjing, et al. A new double gate SOI LDMOS with a step doping profile in the drift region. Journal of Semiconductors, 2009, 30:084006 doi: 10.1088/1674-4926/30/8/084006
[6]
Radhakrishna U, DasGupta A, DasGupta N, et al. Modeling of SOI-LDMOS transistor including impact ionization, snapback, and self-heating. IEEE Trans Electron Devices, 2011, 58:4035 doi: 10.1109/TED.2011.2165724
[7]
Son W S, Sohn Y H, Choi S Y. SOI RESURF LDMOS transistor using trench filled with oxide. Electron Lett, 2003, 39:1760 doi: 10.1049/el:20031115
[8]
Leung Y K, Paul A K, Goodson K E, et al. Heating mechanisms of LDMOS and LIGBT in ultrathin SOI. IEEE Electron Device Lett, 1997, 18(9):414 doi: 10.1109/55.622514
Murthy B R, Mukherjee-Roy M, Krishnamoorthy A, et al. Reactive ion etching and characterization of p-silk ultra low-k film. IEEE Trans Semicond Manuf, 2005, 18:174 doi: 10.1109/TSM.2004.840537
[11]
Luo X, Udrea F, Wang Y, et al. Partial SOI power LDMOS with a variable low-k dielectric buried layer and a buried P layer. IEEE Electron Device Lett, 2010, 31(6):594 doi: 10.1109/LED.2010.2046616
[12]
Lubguban J J, Seitob A, Kurata Y, et al. Stability of the dielectric properties of PECVD deposited carbon-doped SiOF films. Thin Solid Films, 1999, 337(1/2):67
[13]
Yoneda K, Kato M, Nakao S, et al. Robust low-k diffusion barrier (k=3.5) for 45-nm node low-k (k=2.3)/Cu integration. Proc Interconnect Technology Conference, 2006:184 doi: 10.1007/978-0-387-95868-2_21/fulltext.html
[14]
Théolier L, Mahfoz-Kotb H, Isoird K, et al. A new junction termination using a deep trench filled with benzocyclobutene. IEEE Electron Device Lett, 2009, 30(6):687 doi: 10.1109/LED.2009.2020348
[15]
Wang Y, Jiao W L, Hu H F, et al. A gate enhanced power U-shaped MOSFET integrated with a Schottky rectifier. Chin Phys B, 2012, 21(5):056104 doi: 10.1088/1674-1056/21/5/056104
[16]
Li Xiaorong, Zhang Bo, Li Zhaoji, et al. A novel SOI high voltage device structure with a partial locating charge trench. Chinese Journal of Electronics, 2006, 27(5):881 doi: 10.1007/s10825-017-0994-7
[17]
Li W Y, Ru G P, Jiang Y L, et al. Trapezoid mesa trench metal-oxide-semiconductor barrier Schottky rectifier:an improved Schottky rectifier with better reverse characteristics. Chin Phys B, 2011, 20(8):087304 doi: 10.1088/1674-1056/20/8/087304
[18]
Moens P, Boschd G V. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6:349 doi: 10.1109/TDMR.2006.882212
[19]
Khemka V, Parthasarathy V, Zhu R, et al. Experimental and theoretical analysis of energy capability of RESURF LDMOSFETs and its correlation with static electrical safe operating area (SOA). IEEE Trans Electron Devices, 2002, 49:1049 doi: 10.1109/TED.2002.1003740
[20]
Ren M, Li Z H, Deng G M, et al. A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching. Chin Phys B, 2012, 21(4):048502 doi: 10.1088/1674-1056/21/4/048502
Yin Shan, Qiao Ming, Zhang Yongman, et al. Design of 700 V triple RESURF nLDMOS with low on-resistance. Journal of Semiconductors, 2011, 32:114002 doi: 10.1088/1674-4926/32/11/114002
[23]
Li Z J, Zhang B, Luo X R, et al. The rule of field enhancement for buried dielectric layer of SQl high voltage devices. Proc ICCCAS, 2007:1302
[24]
Zhang B, Li Z, Hu S, et al. Field enhancement for dielectric layer of high-voltage devices on silicon on insulator. IEEE Trans Electron Devices, 2009, 56:2327 doi: 10.1109/TED.2009.2028405
[25]
Wu L J, Hu S D, Luo X R, et al. Partial-SOI high voltage P-channel LDMOS with interface accumulation holes. Chin Phys B, 2011, 20(10):107101 doi: 10.1088/1674-1056/20/10/107101
[26]
Tang Z, Ye P D, Lee D, et al. Electrical measurements of voltage stressed Al2O3/GaAs MOSFET. Microelectron Reliab, 2007, 47(12):2082 doi: 10.1016/j.microrel.2007.02.012
[27]
Moens P, Van den bosch G. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6(3):349 doi: 10.1109/TDMR.2006.882212
[28]
Pendharkar S, Higgins R, Debolske T, et al. Optimization of low voltage n-channel LDMOS devices to achieve required electrical and lifetime SOA. Proceedings of the 14th International Symposium on Power Semiconductor Devices and ICs, 2002:261 doi: 10.1007/978-3-319-08994-2_11
[29]
Moens P, Van den Bosch G, De Keukeleire C, et al. Hot hole degradation effects in lateral nDMOS transistors. IEEE Trans Electron Devices, 2004, 51(10):1704 doi: 10.1109/TED.2004.834913
[30]
Wang P F, Ding S J, Zhang W, et al. CVD technologies used in preparation of low materials for ULSI. Microfabrication Technol, 2001, 1:30
Cheng J J, Chen X B. Hot-carrier reliability in OPTVLD-LDMOS. Journal of Semiconductors, 2012, 33:064003 doi: 10.1088/1674-4926/33/6/064003
[33]
Steighner J B, Yuan J S. The effect of SOA enhancement on device ruggedness under UIS for the LDMOSFET. IEEE Trans Device Mater Reliab, 2011, 11(2):254 doi: 10.1109/TDMR.2011.2121068
[34]
Zhu R, Khemka V, Bose A, et al. Substrate majority carrier-induced NLDMOSFET failure and its prevention in advanced smart power IC technologies. IEEE Trans Device Mater Reliab, 2006, 6(3):386 doi: 10.1109/TDMR.2006.882198
[35]
Lee C P, Chati F H E, Ma W, et al. The safe operating area of GaAs-based heterojunction bipolar transistors. IEEE Trans Electron Devices, 2006, 53(11):2681 doi: 10.1109/TED.2006.884075
[36]
In't Zandt M A A, Hijzen E A, Hueting R J E, et al. Record-low 4 mΩ·mm2 specific on-resistance for 20 V trench MOSFETs. Proc ISPSD, 2003:32
[37]
Jiang Q, Wang M, Chen X, et al. A high-speed deep-trench MOSFET with a self-biased split gate. IEEE Trans Electron Devices. 2010, 57:1972 doi: 10.1109/TED.2010.2051247
[38]
Rutter P, Peake S T. Low voltage trench MOS combining low specific RDS(on) and QG FOM. Proc ISPSD, 2010:325 doi: 10.1007/978-94-007-1926-2_17
Fig. 1.
Schematic cross-sectional view of the LDT LDMOS. The variation of the low-k trench can enhance the dielectric field by accumulated charges. The low-k material filled in the 1st and 2nd trench can be the same or not, it is dependent on the process compatibility. This device features a 4 μm half cell pitch for simulation purposes (Wt= 0.5 μm, WL= 0.5 μm, Td= 6.0 μm, Ts= 0.375 μm, Td – TL= 1.0 μm, and Nsub= 1.0 × 1015 cm−3). A parasitic npn BJT consists of an N+ source, a P well and an N drift region, and P-well based resistance is given in it.
Fig. 2.
The key process flow of the LDT MOSFET. (a) Etch Si to form low-k dielectric trench. (b) Fill the 2nd trench with low-k (SiO2 or Si3N4) dielectric in the drift region and P-plus poly Si in the P-type well. (c) Etch Si while still maintaining thick enough epitaxy for current conduction. (d) Refill the 1st trench with low-k dielectric.
Fig. 3.
Dependences of lateral ENDIF and vertical ENDIF at the breakdown and charge concentration accumulated at both sides of the low-k (2.0, 2.65, 3.5, and 3.9) dielectric trench. Both of the trenches are filled with SiO2 in the same size (Dt= 5.0 μm, Nd= 2.0 × 1015 cm−3). (a) Electric field in the 1st trench with varied k along y=−0.5μm. (b) Electric field in BOX with varied k along x=−1.0μm. (c) Ionized charge (ionized acceptor and ionized donor) concentration along y=−0.5μm. (d) Inversion charge (electron and hole) concentration along x=−1.0μm.
Fig. 4.
(a) Dependence of BV as a function of Dt (Nd= 2.0 × 1015 cm−3). (b) Influence of BV on Nd (Dt= 4.0 μm). (c) Varied k versus BV for LDT MOSFET (Dt= 4.0 μm, Nd= 2.0 × 1015 cm−3).
Fig. 5.I–V characteristics of the LDT MOSFET (k1=k2= 3.9, Dt= 5.0 μm, Nd= 2.0 × 1015 cm−3). (a) Representative DC family of I–V curves at low bias. (b) I–V characteristics with BJT turned on at high bias; the current is saturated with saturation of conduction of the parasitic BJT. (c) Current flowline contours (Vgs= 2.0 V) at breakdown.
Table 1.
Comparison of gate-to-drain charge, specific on-resistance, and Baliga's figure of merit (with different half-cell pitches).
[1]
Luo X, Zhang B, Li Z, et al. A novel 700-V SOI LDMOS with double-sided trench. IEEE Electron Device Lett, 2007, 28:422 doi: 10.1109/LED.2007.894648
[2]
Luo X R, Yao G L, Chen X, et al. Ultra-low on-resistance high voltage (> 600 V) SOI MOSFET with a reduced cell pitch. Chin Phys B, 2011, 20(2):028501 doi: 10.1088/1674-1056/20/2/028501
[3]
Ren M, Li Z H, Liu X L, et al. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands. Chin Phys B, 2011, 20(12):128501 doi: 10.1088/1674-1056/20/12/128501
[4]
Wang C L, Sun J. An oxide filled extended trench gate super junction MOSFET structure. Chin Phys B, 2009, 18(3):1231 doi: 10.1088/1674-1056/18/3/065
[5]
Luo Xiaorong, Zhang Wei, Gu Jingjing, et al. A new double gate SOI LDMOS with a step doping profile in the drift region. Journal of Semiconductors, 2009, 30:084006 doi: 10.1088/1674-4926/30/8/084006
[6]
Radhakrishna U, DasGupta A, DasGupta N, et al. Modeling of SOI-LDMOS transistor including impact ionization, snapback, and self-heating. IEEE Trans Electron Devices, 2011, 58:4035 doi: 10.1109/TED.2011.2165724
[7]
Son W S, Sohn Y H, Choi S Y. SOI RESURF LDMOS transistor using trench filled with oxide. Electron Lett, 2003, 39:1760 doi: 10.1049/el:20031115
[8]
Leung Y K, Paul A K, Goodson K E, et al. Heating mechanisms of LDMOS and LIGBT in ultrathin SOI. IEEE Electron Device Lett, 1997, 18(9):414 doi: 10.1109/55.622514
Murthy B R, Mukherjee-Roy M, Krishnamoorthy A, et al. Reactive ion etching and characterization of p-silk ultra low-k film. IEEE Trans Semicond Manuf, 2005, 18:174 doi: 10.1109/TSM.2004.840537
[11]
Luo X, Udrea F, Wang Y, et al. Partial SOI power LDMOS with a variable low-k dielectric buried layer and a buried P layer. IEEE Electron Device Lett, 2010, 31(6):594 doi: 10.1109/LED.2010.2046616
[12]
Lubguban J J, Seitob A, Kurata Y, et al. Stability of the dielectric properties of PECVD deposited carbon-doped SiOF films. Thin Solid Films, 1999, 337(1/2):67
[13]
Yoneda K, Kato M, Nakao S, et al. Robust low-k diffusion barrier (k=3.5) for 45-nm node low-k (k=2.3)/Cu integration. Proc Interconnect Technology Conference, 2006:184 doi: 10.1007/978-0-387-95868-2_21/fulltext.html
[14]
Théolier L, Mahfoz-Kotb H, Isoird K, et al. A new junction termination using a deep trench filled with benzocyclobutene. IEEE Electron Device Lett, 2009, 30(6):687 doi: 10.1109/LED.2009.2020348
[15]
Wang Y, Jiao W L, Hu H F, et al. A gate enhanced power U-shaped MOSFET integrated with a Schottky rectifier. Chin Phys B, 2012, 21(5):056104 doi: 10.1088/1674-1056/21/5/056104
[16]
Li Xiaorong, Zhang Bo, Li Zhaoji, et al. A novel SOI high voltage device structure with a partial locating charge trench. Chinese Journal of Electronics, 2006, 27(5):881 doi: 10.1007/s10825-017-0994-7
[17]
Li W Y, Ru G P, Jiang Y L, et al. Trapezoid mesa trench metal-oxide-semiconductor barrier Schottky rectifier:an improved Schottky rectifier with better reverse characteristics. Chin Phys B, 2011, 20(8):087304 doi: 10.1088/1674-1056/20/8/087304
[18]
Moens P, Boschd G V. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6:349 doi: 10.1109/TDMR.2006.882212
[19]
Khemka V, Parthasarathy V, Zhu R, et al. Experimental and theoretical analysis of energy capability of RESURF LDMOSFETs and its correlation with static electrical safe operating area (SOA). IEEE Trans Electron Devices, 2002, 49:1049 doi: 10.1109/TED.2002.1003740
[20]
Ren M, Li Z H, Deng G M, et al. A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching. Chin Phys B, 2012, 21(4):048502 doi: 10.1088/1674-1056/21/4/048502
Yin Shan, Qiao Ming, Zhang Yongman, et al. Design of 700 V triple RESURF nLDMOS with low on-resistance. Journal of Semiconductors, 2011, 32:114002 doi: 10.1088/1674-4926/32/11/114002
[23]
Li Z J, Zhang B, Luo X R, et al. The rule of field enhancement for buried dielectric layer of SQl high voltage devices. Proc ICCCAS, 2007:1302
[24]
Zhang B, Li Z, Hu S, et al. Field enhancement for dielectric layer of high-voltage devices on silicon on insulator. IEEE Trans Electron Devices, 2009, 56:2327 doi: 10.1109/TED.2009.2028405
[25]
Wu L J, Hu S D, Luo X R, et al. Partial-SOI high voltage P-channel LDMOS with interface accumulation holes. Chin Phys B, 2011, 20(10):107101 doi: 10.1088/1674-1056/20/10/107101
[26]
Tang Z, Ye P D, Lee D, et al. Electrical measurements of voltage stressed Al2O3/GaAs MOSFET. Microelectron Reliab, 2007, 47(12):2082 doi: 10.1016/j.microrel.2007.02.012
[27]
Moens P, Van den bosch G. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6(3):349 doi: 10.1109/TDMR.2006.882212
[28]
Pendharkar S, Higgins R, Debolske T, et al. Optimization of low voltage n-channel LDMOS devices to achieve required electrical and lifetime SOA. Proceedings of the 14th International Symposium on Power Semiconductor Devices and ICs, 2002:261 doi: 10.1007/978-3-319-08994-2_11
[29]
Moens P, Van den Bosch G, De Keukeleire C, et al. Hot hole degradation effects in lateral nDMOS transistors. IEEE Trans Electron Devices, 2004, 51(10):1704 doi: 10.1109/TED.2004.834913
[30]
Wang P F, Ding S J, Zhang W, et al. CVD technologies used in preparation of low materials for ULSI. Microfabrication Technol, 2001, 1:30
Cheng J J, Chen X B. Hot-carrier reliability in OPTVLD-LDMOS. Journal of Semiconductors, 2012, 33:064003 doi: 10.1088/1674-4926/33/6/064003
[33]
Steighner J B, Yuan J S. The effect of SOA enhancement on device ruggedness under UIS for the LDMOSFET. IEEE Trans Device Mater Reliab, 2011, 11(2):254 doi: 10.1109/TDMR.2011.2121068
[34]
Zhu R, Khemka V, Bose A, et al. Substrate majority carrier-induced NLDMOSFET failure and its prevention in advanced smart power IC technologies. IEEE Trans Device Mater Reliab, 2006, 6(3):386 doi: 10.1109/TDMR.2006.882198
[35]
Lee C P, Chati F H E, Ma W, et al. The safe operating area of GaAs-based heterojunction bipolar transistors. IEEE Trans Electron Devices, 2006, 53(11):2681 doi: 10.1109/TED.2006.884075
[36]
In't Zandt M A A, Hijzen E A, Hueting R J E, et al. Record-low 4 mΩ·mm2 specific on-resistance for 20 V trench MOSFETs. Proc ISPSD, 2003:32
[37]
Jiang Q, Wang M, Chen X, et al. A high-speed deep-trench MOSFET with a self-biased split gate. IEEE Trans Electron Devices. 2010, 57:1972 doi: 10.1109/TED.2010.2051247
[38]
Rutter P, Peake S T. Low voltage trench MOS combining low specific RDS(on) and QG FOM. Proc ISPSD, 2010:325 doi: 10.1007/978-94-007-1926-2_17
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Haitao Li, Jun Qian, Fangfang Han, Tinghui Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. Journal of Semiconductors, 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003
H T Li, J Qian, F F Han, T H Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. J. Semicond., 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003.
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Received: 11 December 2012Revised: 16 January 2013Online:Published: 01 July 2013
Haitao Li, Jun Qian, Fangfang Han, Tinghui Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. Journal of Semiconductors, 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003 ****H T Li, J Qian, F F Han, T H Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. J. Semicond., 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003.
Citation:
Zhigang Wang, Bo Zhang, Zhaoji Li. Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench[J]. Journal of Semiconductors, 2013, 34(7): 074006. doi: 10.1088/1674-4926/34/7/074006
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Z G Wang, B Zhang, Z J Li. Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench[J]. J. Semicond., 2013, 34(7): 074006. doi: 10.1088/1674-4926/34/7/074006.
Haitao Li, Jun Qian, Fangfang Han, Tinghui Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. Journal of Semiconductors, 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003 ****H T Li, J Qian, F F Han, T H Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. J. Semicond., 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003.
Citation:
Zhigang Wang, Bo Zhang, Zhaoji Li. Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench[J]. Journal of Semiconductors, 2013, 34(7): 074006. doi: 10.1088/1674-4926/34/7/074006
****
Z G Wang, B Zhang, Z J Li. Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench[J]. J. Semicond., 2013, 34(7): 074006. doi: 10.1088/1674-4926/34/7/074006.
College of Microelectronics and Solid State Electronics, University of Electronic Science and Technology of China, Chengdu 610051, China
Funds:
Project supported by the National Natural Science Foundation of China (Nos. 60906037, 60906038), the Fundamental Research Funds for the Central Universities, China (Nos. ZYGX2009J027, E022050205), and the Foundation of State Key Laboratory of Electronic Thin Films and Integrated Devices
the National Natural Science Foundation of China60906037
the Fundamental Research Funds for the Central Universities, ChinaZYGX2009J027
the National Natural Science Foundation of China60906038
the Fundamental Research Funds for the Central Universities, ChinaE022050205
the Foundation of State Key Laboratory of Electronic Thin Films and Integrated Devices
A novel silicon-on-insulator (SOI) MOSFET with a variable low-k dielectric trench (LDT MOSFET) is proposed and its performance and characteristics are investigated. The trench in the drift region between drain and source is filled with low-k dielectric to extend the effective drift region. At OFF state, the low-k dielectric trench (LDT) can sustain high voltage and enhance the dielectric field due to the accumulation of ionized charges. At the same time, the vertical dielectric field in the buried oxide can also be enhanced by these ionized charges. Additionally, ON-state analysis of LDT MOSFET demonstrates excellent forward characteristics, such as low gate-to-drain charge density ( < 0.6 nC/mm2) and a robust safe operating area (0-84 V).
Because of its large optical absorption coefficient, a direct band gap (0.85 eV), abundance, and environmentally friendly element resources, semiconducting beta-phase iron disilicide (β-FeSi2) is useful for energy devices such as solar cells, photovoltaic devices, and thermoelectric devices[1-6]. A theoretical energy conversion efficiency of 16%-23% is predicted for β-FeSi2 solar cells[7, 8]. However, to date, there have been limited reports on solar cells fabricated using β-FeSi2, and the highest efficiency reported is 3.7% obtained on a crystalline β-FeSi2 film epitaxially grown on Si substrate[9]. However, this conversion efficiency is still too low to be practical because of the high reflectance from the β-FeSi2/Si interfacial layer. Therefore, the microstructure of the β-FeSi2/Si interface needs to be modified in order to enhance the photovoltaic performance. For example, to enhance trapping light efficiency, the traditional silicon substrates are replaced by textured ones to modify the interfacial structure. In addition, the photovoltaic characteristics can also be improved significantly by adding some Al atoms into the β-FeSi2/Si (100) interface regions[10]. Many reports imply that the β-FeSi2/Si interface is mainly responsible for the optical properties[11-15], but the intrinsic physical mechanism is not well clarified. As we all know, the optical absorption originates from the electronic transition between the conduction band (CB) and valence band (VB), therefore this becomes an important physical problem to clearly display the β-FeSi2/Si interface's electronic and optical absorption behavior.
Many calculations reveal that the optical absorption edge can be tuned by applied high pressure, especial for β-FeSi2 films structures. However, the effect of high pressure on the β-FeSi2/Si interface optical absorption behavior is rarely reported, due to its structure complexity. For example, when a β-FeSi2 film is deposited onto Si epitaxially, the diffusion rates of Fe and Si strongly depend on the preparation methods and, hence, the stoichiometry of the β-FeSi2/Si interface cannot be well controlled; some Si atoms are absent at the interfacial region, and this makes the lattice mismatch further increase[16, 17]. For β-FeSi2/Si interfacial structures, applied high pressure even effectively adjusts the lattice deformation extent systematically, and novel optical absorption behavior may occur. Therefore, a systematic investigation of the optical behavior and electronic structure of a β-FeSi2/Si interface with some Si vacancies at high pressure becomes an urgent objective. In this work, we theoretically display the behaviors of the optical absorption and electronic structures of the β-FeSi2/Si interface with some Si vacancies at different pressure.
2.
The model and calculation method
The heteroepitaxial system consisting of the β-FeSi2 (100)/Si (001) interfacial structure with some Si vacancies are simulated. The calculation is based on the density functional theory (DFT) in generalized gradient approximation (GGA) and Perdew-Burke-Ernzerhof (PBE) exchange-correlation potential, using the CASTEP package with Norm-conserving pseudopotentials[18, 19]. An energy cutoff of 500 eV is used to expand the plane wave functions. The Fe 3d64s2 orbitals and Si 3s23p2 orbitals are treated as valence states. The β-FeSi2 (100)/Si(001) interfacial layer is considered to comprise twelve layers of β-FeSi2 (100) and a Si (001) slabs, as shown in Fig. 1(a) and it has been verified to be well converged. The bottom two layers are fixed to mimic the bulk structure, and relaxation is performed until the following convergence tolerances are reached: 1 × 10−5 eV for energy, 0.03 eV/Å for maximum force, and 0.001 Å for maximum displacement. An external stress is applied by equivalent hydrostatic pressure and the optical properties are calculated based on the independent-particle approximation. The imaginary part of the dielectric function due to transitions between the occupied and unoccupied electronic states is given by the Fermi golden rule[20],
Figure
1.
(Color online) (a) Atomic configuration in the β-FeSi2 (100)/Si (001) model. The interfacial layer is marked by the red dashed line, the crystal orientations are marked by arrows, and gray and yellow balls represent Fe and Si atoms, respectively. The isosurfaces for electronic orbital of the highest occupied state and lowest unoccupied state of β-FeSi2 (100)/Si (001) interface with one Si atom absence at pressure P = 0 GPa are displayed in Figs. 1(b) and 1(c), respectively. The electronic density of the β-FeSi2 (100)/Si (001) interface with one Si atom absence is displayed in Fig. 1(d)
where Ω is the slab unit-cell volume, ℏω is the photon energy, k is the Bloch wave vector, Ec(v)k and |ψc(v)k(r)⟩ are the eigen-energy and wave function, where the superscripts c and v denote the states in the CB and the VB, respectively, r is the position vector, and u is the unit vector along the light polarization. We define the optical gaps as the energy at which the oscillator strength reaches 0.1% of the oscillator strength integrated from 0 to 1 eV. Although the DFT in the GGA is well known to underestimate band gaps, as our calculated band gap of 0.787 eV of bulk FeSi2 is much less than the experimental values of 0.875 eV, the trend of changing optical absorption behavior with applied pressure is reliable.
3.
Results and discussion
At pressure P = 0 GPa, the calculated photoabsorption and dielectric function imaginary part [Im ε] of the β-FeSi2 (100)/Si (001) interface structure containing different Si absences [positions V1 and V2, respectively marked by black circles in Fig. 1(a)] and without vacancies at are calculated and shown in Figs. 2(a) and 2(b), respectively. In the presence of Si vacancies (V1 and V2), the photoabsorption peaks are similar and without obvious difference, which imply that different Si vacancy positions at the interface layer cannot affect their optical behavior. Compared with the results of no vacancy, the Fe-Si bonds at the interface are enlarged form 3.429 to 3.463 Å, this leads to band gap and electronic structure changes[14]. Therefore, the up-shifts of photoabsorption peaks can be attributed to enlarged lattice distortion induced by Si vacancy addition. From the imaginary part of the dielectric function calculated results, we can obtain a similar physical phenomenon, which must be related with the internal electronic structure. Those results indicate that the existence of Si vacancies can affect the stress force imposed on the interface structure, but cannot directly affect the electronic transition between the CB and the VB, therefore the Fe atom state at the interfacial region is considered for this optical behavior.
Figure
2.
(a) Calculated photoabsorption spectra of the β-FeSi2 (100)/Si (001) interface with different Si vacancies at pressure $P =$ 0 GPa. (b) Calculated imaginary part of the dielectric function [Im ε] of the β-FeSi2 (100)/Si (001) interface with different Si vacancies at pressure $P =$ 0 GPa
To further confirm our conjectures, we examine the distribution of the electronic states at the VB and CB by orbital analysis. As pressure changes, the electronic orbital distributions are only slightly affected, but main features are very similar. As a typical characteristic, we display the electronic orbital analysis of the highest occupied states and lowest unoccupied states of the β-FeSi2 (100)/Si (001) interface with Si absence at pressure P = 2 GPa, in Figs. 1(b) and 1(c), respectively. This result obviously discloses that the electronic states are mainly dispersed in the regions of the interfacial Fe atom orbital, but slightly located at the internal Fe and Si atom orbital, which implies that the absence of some Si atoms in the interface cannot affect effectively the optical absorption and electronic transition. To further display electronic distribution behavior, the electronic density is also shown in Fig. 1(d), which also reveals that Fe atoms can tightly bind most electrons. After consideration about electronic structure, we can know that two β-FeSi2 atomic layers in the interfacial region should be mainly responsible for its optical absorption and dielectric function changes. Therefore, we can assume that the lattice distortion at interface as a result of a higher pressure can affect the optical behavior.
The photoabsorption spectra of β-FeSi2 (100)/Si (001) interface with Si vacancy (V1) at pressure P = 0, 1, 2, 3, 4 GPa are calculated and shown in Fig. 3(a). The calculated results show that the photoabsorption peak downshifts sharply to 0.26 eV from 0.21 eV with pressure increase to P = 2 GPa, and then begins to up-shift slowly to 0.35 eV for P = 4 GPa. From the definition of the imaginary part of the dielectric function, we can obtain the electronic transition feature between the lowest occupied and highest unoccupied electronic states. To clarify the photoabsorption physical origin, the imaginary parts of the dielectric function are also displayed in Fig. 3(b). Comparing to the results of photoabsorption, the similar changing features are displayed, which disclose that the lowest occupied and highest unoccupied electronic states are also affected by applied pressure; this may be a real physical reason for their optical behavior. From above analysis, the two interfacial layer atoms deformation as increasing pressure will be responsible for their optical behavior. Then we calculated the elastic constant (C44) for β-FeSi2 and Si, they are 127.1 GPa and 80.31 GPa, respectively. Therefore, the deformation difference as pressure increases will becomes obviously different, especially for interfacial regions with larger lattice mismatch[21]. So this physical process can be clearly displayed. As the pressure increases, the lengths of the Fe-Si bands at interfacial layers are decreased linearly form 2.297 Å (P = 0 GPa) to 2.288 Å (P = 1 GPa), 2.275 Å (P = 2 GPa), 2.273 Å (P = 3 GPa) and 2.269 Å (P = 4 GPa), and the lengths of the Fe-Si bands at internal region are also decreased linearly form 2.385 Å (P = 0 GPa) to 2.379 Å (P = 1 GPa), 2.375 Å (P = 2 GPa), 2.371 Å (P = 3 GPa) and 2.366 Å (P = 4 GPa). However, the difference in values between the interfacial and internal regions initially reaches a maximum 0.100 Å at P = 2 GPa and then decreases gradually to 0.097 Å at P = 4 GPa, which can partially offset the pressure exerted onto the β -FeSi2 (100) slab. This process will lead the absorption peak to down-shift firstly. As the pressure is further increased, the compressed Si (001) slab cannot offset effectively the applied pressure and consequently, the bond length difference decreases slowly. This special transformation in the interfacial region causes the electronic state distributions and electronic transition energy to change. And then the absorption peak slowly up-shifts. This explains why the β -FeSi2 (100)/Si (001) interface exhibits significantly different optical behavior and our study discloses that this phenomenon can be attributed to the deformation caused by different pressure. This behavior is obviously different from β-FeSi2 bulk materials. With increasing pressure, the optical gaps (Eg) of β -FeSi2 bulk materials are lineally enlarged: Eg = 0.78 eV (P = 0 GPa), 0.80 eV (P = 1 GPa), 0.81 eV (P = 2 GPa), 0.83 eV (P = 3 GPa), 0.85 eV (P = 4 GPa).
Figure
3.
(a) Calculated photoabsorption spectra of the β-FeSi2 (100)/Si (001) interface with a Si vacancy at pressure $P =$ 0, 1, 2, 3, 4 GPa. (b) Calculated imaginary part of the dielectric function [Im ε] of β-FeSi2 (100)/Si (001) interface with Si vacancy at pressure $P =$ 0, 1, 2, 3, 4 GPa
In summary, as pressure increases, the absorption spectra theoretically derived from the β-FeSi2 (100)/Si (001) slab indicate that the optical absorption peaks decrease initially, reach a minimum, and then increase gradually. Electronic structural analysis discloses that the Si (001) slab partially offsets the pressure exerted onto the β-FeSi2 (100) surface, and so the lengths of the Fe-Si and Si-Si bonds at the interface are larger than those in the internal region due to lattice mismatch itself, which is equivalent to strain applied to the interfacial region. As the pressure increases further, the compressed structure cannot offset effectively the high pressure, and then the absorption peak increases linearly with increasing pressure. This work discloses that pressure can play an important role in optical absorption behavior.
Luo X, Zhang B, Li Z, et al. A novel 700-V SOI LDMOS with double-sided trench. IEEE Electron Device Lett, 2007, 28:422 doi: 10.1109/LED.2007.894648
[2]
Luo X R, Yao G L, Chen X, et al. Ultra-low on-resistance high voltage (> 600 V) SOI MOSFET with a reduced cell pitch. Chin Phys B, 2011, 20(2):028501 doi: 10.1088/1674-1056/20/2/028501
[3]
Ren M, Li Z H, Liu X L, et al. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands. Chin Phys B, 2011, 20(12):128501 doi: 10.1088/1674-1056/20/12/128501
[4]
Wang C L, Sun J. An oxide filled extended trench gate super junction MOSFET structure. Chin Phys B, 2009, 18(3):1231 doi: 10.1088/1674-1056/18/3/065
[5]
Luo Xiaorong, Zhang Wei, Gu Jingjing, et al. A new double gate SOI LDMOS with a step doping profile in the drift region. Journal of Semiconductors, 2009, 30:084006 doi: 10.1088/1674-4926/30/8/084006
[6]
Radhakrishna U, DasGupta A, DasGupta N, et al. Modeling of SOI-LDMOS transistor including impact ionization, snapback, and self-heating. IEEE Trans Electron Devices, 2011, 58:4035 doi: 10.1109/TED.2011.2165724
[7]
Son W S, Sohn Y H, Choi S Y. SOI RESURF LDMOS transistor using trench filled with oxide. Electron Lett, 2003, 39:1760 doi: 10.1049/el:20031115
[8]
Leung Y K, Paul A K, Goodson K E, et al. Heating mechanisms of LDMOS and LIGBT in ultrathin SOI. IEEE Electron Device Lett, 1997, 18(9):414 doi: 10.1109/55.622514
Murthy B R, Mukherjee-Roy M, Krishnamoorthy A, et al. Reactive ion etching and characterization of p-silk ultra low-k film. IEEE Trans Semicond Manuf, 2005, 18:174 doi: 10.1109/TSM.2004.840537
[11]
Luo X, Udrea F, Wang Y, et al. Partial SOI power LDMOS with a variable low-k dielectric buried layer and a buried P layer. IEEE Electron Device Lett, 2010, 31(6):594 doi: 10.1109/LED.2010.2046616
[12]
Lubguban J J, Seitob A, Kurata Y, et al. Stability of the dielectric properties of PECVD deposited carbon-doped SiOF films. Thin Solid Films, 1999, 337(1/2):67
[13]
Yoneda K, Kato M, Nakao S, et al. Robust low-k diffusion barrier (k=3.5) for 45-nm node low-k (k=2.3)/Cu integration. Proc Interconnect Technology Conference, 2006:184 doi: 10.1007/978-0-387-95868-2_21/fulltext.html
[14]
Théolier L, Mahfoz-Kotb H, Isoird K, et al. A new junction termination using a deep trench filled with benzocyclobutene. IEEE Electron Device Lett, 2009, 30(6):687 doi: 10.1109/LED.2009.2020348
[15]
Wang Y, Jiao W L, Hu H F, et al. A gate enhanced power U-shaped MOSFET integrated with a Schottky rectifier. Chin Phys B, 2012, 21(5):056104 doi: 10.1088/1674-1056/21/5/056104
[16]
Li Xiaorong, Zhang Bo, Li Zhaoji, et al. A novel SOI high voltage device structure with a partial locating charge trench. Chinese Journal of Electronics, 2006, 27(5):881 doi: 10.1007/s10825-017-0994-7
[17]
Li W Y, Ru G P, Jiang Y L, et al. Trapezoid mesa trench metal-oxide-semiconductor barrier Schottky rectifier:an improved Schottky rectifier with better reverse characteristics. Chin Phys B, 2011, 20(8):087304 doi: 10.1088/1674-1056/20/8/087304
[18]
Moens P, Boschd G V. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6:349 doi: 10.1109/TDMR.2006.882212
[19]
Khemka V, Parthasarathy V, Zhu R, et al. Experimental and theoretical analysis of energy capability of RESURF LDMOSFETs and its correlation with static electrical safe operating area (SOA). IEEE Trans Electron Devices, 2002, 49:1049 doi: 10.1109/TED.2002.1003740
[20]
Ren M, Li Z H, Deng G M, et al. A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching. Chin Phys B, 2012, 21(4):048502 doi: 10.1088/1674-1056/21/4/048502
Yin Shan, Qiao Ming, Zhang Yongman, et al. Design of 700 V triple RESURF nLDMOS with low on-resistance. Journal of Semiconductors, 2011, 32:114002 doi: 10.1088/1674-4926/32/11/114002
[23]
Li Z J, Zhang B, Luo X R, et al. The rule of field enhancement for buried dielectric layer of SQl high voltage devices. Proc ICCCAS, 2007:1302
[24]
Zhang B, Li Z, Hu S, et al. Field enhancement for dielectric layer of high-voltage devices on silicon on insulator. IEEE Trans Electron Devices, 2009, 56:2327 doi: 10.1109/TED.2009.2028405
[25]
Wu L J, Hu S D, Luo X R, et al. Partial-SOI high voltage P-channel LDMOS with interface accumulation holes. Chin Phys B, 2011, 20(10):107101 doi: 10.1088/1674-1056/20/10/107101
[26]
Tang Z, Ye P D, Lee D, et al. Electrical measurements of voltage stressed Al2O3/GaAs MOSFET. Microelectron Reliab, 2007, 47(12):2082 doi: 10.1016/j.microrel.2007.02.012
[27]
Moens P, Van den bosch G. Characterization of total safe operating area of lateral DMOS transistors. IEEE Trans Device Mater Reliab, 2006, 6(3):349 doi: 10.1109/TDMR.2006.882212
[28]
Pendharkar S, Higgins R, Debolske T, et al. Optimization of low voltage n-channel LDMOS devices to achieve required electrical and lifetime SOA. Proceedings of the 14th International Symposium on Power Semiconductor Devices and ICs, 2002:261 doi: 10.1007/978-3-319-08994-2_11
[29]
Moens P, Van den Bosch G, De Keukeleire C, et al. Hot hole degradation effects in lateral nDMOS transistors. IEEE Trans Electron Devices, 2004, 51(10):1704 doi: 10.1109/TED.2004.834913
[30]
Wang P F, Ding S J, Zhang W, et al. CVD technologies used in preparation of low materials for ULSI. Microfabrication Technol, 2001, 1:30
Cheng J J, Chen X B. Hot-carrier reliability in OPTVLD-LDMOS. Journal of Semiconductors, 2012, 33:064003 doi: 10.1088/1674-4926/33/6/064003
[33]
Steighner J B, Yuan J S. The effect of SOA enhancement on device ruggedness under UIS for the LDMOSFET. IEEE Trans Device Mater Reliab, 2011, 11(2):254 doi: 10.1109/TDMR.2011.2121068
[34]
Zhu R, Khemka V, Bose A, et al. Substrate majority carrier-induced NLDMOSFET failure and its prevention in advanced smart power IC technologies. IEEE Trans Device Mater Reliab, 2006, 6(3):386 doi: 10.1109/TDMR.2006.882198
[35]
Lee C P, Chati F H E, Ma W, et al. The safe operating area of GaAs-based heterojunction bipolar transistors. IEEE Trans Electron Devices, 2006, 53(11):2681 doi: 10.1109/TED.2006.884075
[36]
In't Zandt M A A, Hijzen E A, Hueting R J E, et al. Record-low 4 mΩ·mm2 specific on-resistance for 20 V trench MOSFETs. Proc ISPSD, 2003:32
[37]
Jiang Q, Wang M, Chen X, et al. A high-speed deep-trench MOSFET with a self-biased split gate. IEEE Trans Electron Devices. 2010, 57:1972 doi: 10.1109/TED.2010.2051247
[38]
Rutter P, Peake S T. Low voltage trench MOS combining low specific RDS(on) and QG FOM. Proc ISPSD, 2010:325 doi: 10.1007/978-94-007-1926-2_17
Haitao Li, Jun Qian, Fangfang Han, Tinghui Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. Journal of Semiconductors, 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003 ****H T Li, J Qian, F F Han, T H Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. J. Semicond., 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003.
Haitao Li, Jun Qian, Fangfang Han, Tinghui Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. Journal of Semiconductors, 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003
****
H T Li, J Qian, F F Han, T H Li. Density functional theory studies of the optical properties of a β-FeSi2 (100)/Si (001) interface at high pressure[J]. J. Semicond., 2013, 34(7): 072003. doi: 10.1088/1674-4926/34/7/072003.
Figure Fig. 1. Schematic cross-sectional view of the LDT LDMOS. The variation of the low-k trench can enhance the dielectric field by accumulated charges. The low-k material filled in the 1st and 2nd trench can be the same or not, it is dependent on the process compatibility. This device features a 4 μm half cell pitch for simulation purposes (Wt= 0.5 μm, WL= 0.5 μm, Td= 6.0 μm, Ts= 0.375 μm, Td – TL= 1.0 μm, and Nsub= 1.0 × 1015 cm−3). A parasitic npn BJT consists of an N+ source, a P well and an N drift region, and P-well based resistance is given in it.
Figure Fig. 2. The key process flow of the LDT MOSFET. (a) Etch Si to form low-k dielectric trench. (b) Fill the 2nd trench with low-k (SiO2 or Si3N4) dielectric in the drift region and P-plus poly Si in the P-type well. (c) Etch Si while still maintaining thick enough epitaxy for current conduction. (d) Refill the 1st trench with low-k dielectric.
Figure Fig. 3. Dependences of lateral ENDIF and vertical ENDIF at the breakdown and charge concentration accumulated at both sides of the low-k (2.0, 2.65, 3.5, and 3.9) dielectric trench. Both of the trenches are filled with SiO2 in the same size (Dt= 5.0 μm, Nd= 2.0 × 1015 cm−3). (a) Electric field in the 1st trench with varied k along y=−0.5μm. (b) Electric field in BOX with varied k along x=−1.0μm. (c) Ionized charge (ionized acceptor and ionized donor) concentration along y=−0.5μm. (d) Inversion charge (electron and hole) concentration along x=−1.0μm.
Figure Fig. 4. (a) Dependence of BV as a function of Dt (Nd= 2.0 × 1015 cm−3). (b) Influence of BV on Nd (Dt= 4.0 μm). (c) Varied k versus BV for LDT MOSFET (Dt= 4.0 μm, Nd= 2.0 × 1015 cm−3).
Figure Fig. 5. I–V characteristics of the LDT MOSFET (k1=k2= 3.9, Dt= 5.0 μm, Nd= 2.0 × 1015 cm−3). (a) Representative DC family of I–V curves at low bias. (b) I–V characteristics with BJT turned on at high bias; the current is saturated with saturation of conduction of the parasitic BJT. (c) Current flowline contours (Vgs= 2.0 V) at breakdown.
Figure Fig. 6. Gate voltage Vgs as a function of gate-to-drain charge density Qgd for the LDT MOSFET (k1=k2= 3.9, Dt= 5.0 μm, Nd= 2.0 × 1015 cm−3).
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