Fig. 1.
Proposed current-mode receiver block diagram
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| Citation: |
Yiqiang Wu, Zhigong Wang, Junliang Wang, Li Ma, Jian Xu, Lu Tang. Lower-power, high-linearity class-AB current-mode programmable gain amplifier[J]. Journal of Semiconductors, 2014, 35(10): 105003. doi: 10.1088/1674-4926/35/10/105003
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Y Q Wu, Z G Wang, J L Wang, L Ma, J Xu, L Tang. Lower-power, high-linearity class-AB current-mode programmable gain amplifier[J]. J. Semicond., 2014, 35(10): 105003. doi: 10.1088/1674-4926/35/10/105003.
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Lower-power, high-linearity class-AB current-mode programmable gain amplifier
DOI: 10.1088/1674-4926/35/10/105003
More Information
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Abstract
A novel class-AB implementation of a current-mode programmable gain amplifier (CPGA) including a current-mode DC offset cancellation loop is presented. The proposed CPGA is based on a current amplifier and provides a current gain in a range of 40 dB with a 1 dB step. The CPGA is characterized by a wide range of current gain variation, a lower power dissipation, and a small chip size. The proposed circuit is fabricated using a 0.18 μm CMOS technology. The CPGA draws a current of less than 2.52 mA from a 1.8 V supply while occupying an active area of 0.099 μm2. The measured results show an overall gain variation from 10 to 50 dB with a gain error of less than 0.40 dB. The OP1dB varies from 11.80 to 13.71 dBm, and the 3 dB bandwidth varies from 22.2 to 34.7 MHz over the whole gain range.-
Keywords:
- current mode,
- class AB,
- programmable gain amplifier,
- current amplifier
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References
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