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J. Semicond. > 2014, Volume 35 > Issue 12 > 126002
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SEMICONDUCTOR TECHNOLOGY

A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography

Mingyan Yu1, 2, , Shirui Zhao2, Yupeng Jing2, Yunbo Shi1 and Baoqin Chen2

+ Author Affiliations

 Corresponding author: Yu Mingyan, Email:yumingyan@ime.ac.cn

DOI: 10.1088/1674-4926/35/12/126002

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Abstract: Pattern distortions caused by the charging effect should be reduced while using the electron beam lithography process on an insulating substrate. We have developed a novel process by using the SX AR-PC 5000/90.1 solution as a spin-coated conductive layer, to help to fabricate nanoscale patterns of poly-methyl-methacrylate polymer resist on glass for phased array device application. This method can restrain the influence of the charging effect on the insulating substrate effectively. Experimental results show that the novel process can solve the problems of the distortion of resist patterns and electron beam main field stitching error, thus ensuring the accuracy of the stitching and overlay of the electron beam lithography system. The main characteristic of the novel process is that it is compatible to the multi-layer semiconductor process inside a clean room, and is a green process, quite simple, fast, and low cost. It can also provide a broad scope in the device development on insulating the substrate, such as high density biochips, flexible electronics and liquid crystal display screens.

Key words: charging effect, pattern distortions, electron beam lithography

Electron beam lithography (EBL) is one of the fabrication techniques considered for nano-scale devices[1-4]. With the continuous miniaturization of the critical dimension (CD) of semiconductor technology, the nanolithography technique has reached the 22 nm threshold and lower[5]. In this condition, an electron beam with a high accelerating voltage is much more advantageous when fabricating a sub-22 nm pattern size[6]. While using insulating substrates, which is often restricted by the surface charging effect during electron beam direct writing[7-9], charge is trapped around the substrate surface and cannot be dissipated as on conductive substrates. The higher the electron beam voltage is, the larger the scattering range is, the larger the amount of accumulated charge is, and the more serious the charging effect is. Figure 1 shows the discharge phenomenon and lines distortion of the photoresist caused by the charging effect in our previous experiment. Therefore, it is important to find a new method to solve this problem. Researchers used an electron beam with a low accelerating voltage to fabricate PMMA patterns on glass and they obtained good results[10, 11].

Figure  1.  Discharge phenomenon and lines distortion of photoresist caused by the charging effect in high energy electron beam lithography on insulating substrate
DownLoad: Full-Size Img PowerPoint

Generally, in order to restrain the influence of the charging effect, a layer of metal film is deposited on the surface of the substrate to dissipate the accumulated charge. However, this kind of method is used successfully for first layer electron beam direct writing[12-15]. Due to the metal contamination, the metal film is not allowed in some semiconductor processes. Besides, the metal film can generate an electron current in high energy lithography, which can also repel the direct writing electron beam and cause the deviation of exposure beam position. While using electron beam lithography for the next several layer overlay to pre-pattern structures, it is still a challenge to dissipate the accumulated charge on the isolated patterns on insulating substrates without causing pattern distortion. In this paper, in order to fabricate the Phase Array Devices with a glass substrate, a novel process using conductive resist SX AR-PC 5000/90.1 (GermanTech Co., Ltd) was developed to restrain the charging effect; not only can it be used on pre-patterned isolated structures on an insulating substrate, but also it can be expanded to the untreated insulating substrate directly. The process has several advantages. First, it is totally compatible to the semiconductor process in a clean room, so the conductive layer can be spin-coated on the substrate directly. Second, the conductive layer is water soluble, which can be removed easily without affecting the performances and structures of the device. Thus the process is a green, simple, fast and low cost process.

The SX AR-PC 5000/90.1 solution (GermanTech Co., Ltd) is spin-coated to form a conductive protective thin layer, to dissipate the electrostatic charges generated during electron beam direct writing. There are many tiny conductive particles that are added to the conductive resist solution. During the beam writing process, the accumulated charges are dissipated through the exposure of these conductive particles. The detailed mechanism using conductive particles as the charge dissipating medium is still under investigation nowadays. After being exposed by an electron beam, the performance of the conductive resist layer is similar to a negative resist, while it is immersed in deionized water, as the developing process, within 2 min, there are patterns left. While developing for more than 10 min, all conductive layers will be completely removed with the bottom layer uncovered. In the experiment, we conducted three sets of comparative processes on an insulating substrate to develop a suitable process for phase array device fabrication by overlay and direct writing, using a metal layer and a conductive polymer layer respectively as the charge dissipating medium. The three processes are illustrated as follows.

1. For substrate 1#, the experimental procedures are as follows.

(1) A layer of ITO (Indium tin oxide) and a layer of Cr were deposited on the surface of the glass substrate.

(2) A layer of SAL601 resist was spin-coated above the Cr layer. The first layer patterns were exposed by the MEBS 4700S EBL system. The patterns were developed after exposure.

(3) The patterns generated were transferred to a metal ITO/Cr layer by chemical etching. The patterned metal structures became isolated, which were separated by an uncovered glass substrate.

(4) A layer of PMMA resist was spin-coated above the metal pattern with 3000 r/min for 1 min, and subsequently the substrate was baked via a hot plate at 180 ℃ for 2 min, then the overlay and direct writing was proceeded by a high resolution JBX-6300FS EBL system.

(5) The developing of PMMA was conducted by 1 : 3 of MIBK (methyl isobutyl ketone) and IPA (iso-propyl alcohol) solution. The developing time was 5 min, and the time for fixing with IPA was 30 s. The whole experiment was carried out under ambient clean room conditions. The process flow is shown in Fig. 2.

Figure  2.  Schematic process flow diagram of insulating substrate 1# coated with charge dissipating metal layer and PMMA resist
DownLoad: Full-Size Img PowerPoint

2. For substrate 2#, the experimental procedures are as follows.

(1) A layer of ITO and a layer of Cr were deposited on the surface of the glass substrate.

(2) A layer of SAL601 resist was spin-coated above the Cr layer. The first layer patterns were exposed by the MEBS 4700S EBL system. The patterns were developed after exposure.

(3) The patterns generated were transferred to a metal ITO/Cr layer by chemical etching. The patterned metal structures became isolated, which were separated by an uncovered glass substrate.

(4) A layer of PMMA resist was spin-coated above the metal pattern with 3000 r/min for 1 min, and subsequently the substrate was baked via a hot plate at 180 ℃ for 2 min. All the above procedures were the same as for substrate 1#. Then a layer of conductive resist was spin-coated above PMMA with 300 r/min for 1 min. Then the overlay and direct writing was proceeded by the high resolution JBX-6300FS EBL system.

(5) The developing process was successfully conducted as follows. The substrate was first immersed in deionized water for 10 min to remove the conductive resist layer completely, and then the PMMA resist was developed using an organic solvent, as illustrate for substrate 1#. The immersion and removal of the conductive layer with water did not affect the developing process and the performance of the PMMA resist at all.

The flow process is shown in Fig. 3.

Figure  3.  Schematic process flow diagram of insulating substrate 2# coated with a metal layer, PMMA resist and conductive polymer layer
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3. For substrate 3#, the experimental procedures are as follows.

(1) After the spin-coated layer of PMMA, another layer of conductive resist was spin-coated on the substrate directly. Then the substrate was exposed by the JBX-6300FS EBL system.

(2) After the exposure process, substrate 3# was immersed in deionized water for 10 min to remove the top conductive layer completely, and then the PMMA resist was developed using an organic solvent as illustrated for substrate 1#. The process flow is shown in Fig. 4.

Figure  4.  Schematic process flow diagram of insulating substrate 3# coated with PMMA resist and conductive polymer layer
DownLoad: Full-Size Img PowerPoint

3.1 Charging effect and pattern distortion on insulating substrate with pre-patterned isolated metal structures

Figure 5 shows the SEM (scanning electron microscope) image of the substrate 1#. Figure 5(a) is the test pattern data in the experiment and its dimension is 1 × 1 mm2. Figure 5(b) is an enlarged SEM view of part of the center of the test pattern, where the designed line width from left to right are 500, 1000, 100, 50, and 40 nm respectively. The distances between all lines are 50 μm and the dimension of the rectangle pattern area in (d) is 14 × 12 μm2. It can be seen that the line distortion still exists under the condition of a metal interlayer on glass, although it is not serious as shown in Fig. 1.

Figure  5.  Distortion of main field exposure caused by the charging effect on an insulating substrate, where the stitching error reaches several microns. (a) The test pattern for the experiment, which includes a line group with a different width and rectangle area with different dimensions. (b) Part of an enlarged view of the distortions of exposure of the main fields and lines. (c) Part of an enlarged view of the distortion of a line with a 1 μm width; the line is divided into four lines. (d) Distortion of a rectangular pattern of 14 × 12 μm2. (e) Part of an enlarged view of (d)
DownLoad: Full-Size Img PowerPoint

In Fig. 5, the distortion caused by the surface charging effect on a glass substrate is measured by SEM. The distortion around the square area is obvious because there is more charge accumulated. For substrate 1# in Fig. 5, before the first exposure process, the metal layer is grounded by connecting with the conductive probe, as shown in Fig. 2, which is nowadays widely used to dissipate the charge while directly writing on insulating substrates. However, after the chemical etching process, the area of the substrate uncovered on glass is non-conductive. That is, the structures of ITO and Cr are isolated without being grounded, and the accumulated charge cannot dissipate, so the distortions still exist. The Cr and ITO layers alleviate the charging effect on an insulating substrate, to a certain degree.

The mechanism of pattern distortions is illustrated in Fig. 6. Figure 6(a) is a schematic of the exposure main field division for a patterned structure. The dimension of each main field used here is 62.5 μm, and the electron beam exposal sequence is shown as the arrow direction. Figure 6(b) is the enlarged view of each main field, the scanning direction of the electron beam is shown as the arrow and the scanning range of the electron beam as a sub-field is about 250 nm. For single lines with critical dimensions of 1 μm, and 500 nm, after exposure, they were divided into four lines and two lines, respectively, as illustrated in Figs. 5(c), 6(c) and 6(e). The distortion and pattern overlay are still challenges to Phase Array Device fabrication using a glass substrate.

Figure  6.  Schematic of the exposure main field and the distortion of test pattern. (a) The division of the exposure main field. (b) Part of an enlarged view of each main field. (c) Distortion of a line with 1 μm width. (d), (e) Schematics of the test pattern in Fig. 5(c).
DownLoad: Full-Size Img PowerPoint

The level of main field stitching and pattern distortion is related to the amount of charge trapped in the square patterns. At the square patterns area, the amount of accumulated charge is large, so the distortion is obvious, and the larger the square pattern area is, the more serious the distortion becomes. From Fig. 5(c), it can be seen that the distortion of 1 μm line is about 5 μm for a square pattern of 5 × 5 μm2, and the pattern distortion and stitching error for the 250 nm sub-field is about hundreds of nanometers to 1 μm.

In order to elucidate the influence of charge accumulation on the deviation of the electron beam direct writing position on an insulating substrate, the charging accumulation phenomena can be compared with the proximity effect caused by the electron scattering in electron beam lithography[16]. The randomness of electron scattering trajectories is used to reflect the scattering range of electrons in an insulating substrate. Figure 7 shows a simulation analysis for the variation of the scattering range of accumulated charge with different electron beam accelerating voltages on a glass substrate. The scattering range increased and finally achieves its maximum at 100 keV when the voltage is enlarged from 10 to 100 keV, and meanwhile, the influence range of the pattern distortion is also the largest at 100 keV in experiments. Nowadays, low-voltage electron beam lithography is recommended for directly writing work on an insulating substrate[17].

Figure  7.  Simulation analysis of the quantity of accumulated charge with different accelerating voltages.
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Further, according to the research of Satyalakshmi et al.[17] and our previous experiments, the distortion is also depends on several factors, such as the dimension size and density of patterns, the working distance of the electron beam, the surface charge density, the molecular weight of the resist, and the dielectric constant of insulating substrate materials, etc. A more detailed physical model is still under investigation to understand the influence of the charging effect in future study.

3.2 Charging effect restrained using conductive polymer layers on an insulating substrate with pre-patterned isolated metal structures

Figure 8(a) shows the exposure result of substrate 1# without conductive resist, (b), (c), (d) are enlarged views of (a); (e) is the exposure result of substrate 2# with a thin layer of conductive resist, it can be seen that the distortions are improved to a certain degree, but they cannot be eliminated. Besides, the immersion time is 1 min for the conductive resist in deionized water, which is not enough for the residue to be dissolved completely. When the immersion time is extended to 10 min, the residue can be removed completely, as shown in Figs. 9 and 10.

Figure  8.  Example of distortion and stitching error of main field exposure caused by the charging effect on insulating substrate. (a) Exposure result of insulating substrate 1# without conductive resist. (b), (c), (d) Part of an enlarged SEM view of (a). (e) Exposure result of insulating substrate 2# with a thin layer conductive resist. The immersed time of the conductive resist in DI water is 1 min.
DownLoad: Full-Size Img PowerPoint
Figure  9.  Exposure result of substrate 2# with a thick layer of conductive resist after being immersed in DI water for 10 min
DownLoad: Full-Size Img PowerPoint
Figure  10.  (a) Exposure result of substrate 3# with a thick layer of conductive resist above the PMMA directly. (b), (c), (f) Part of the enlarged view of (a), where the designed width of the line group from left to right is 1--10 nm respectively in (b). (d), (e) Enlarged views of (c) and (f) respectively, where the designed line width is 1 μm in (d)
DownLoad: Full-Size Img PowerPoint

Figure 9 shows the exposure result of substrate 2# with a thick layer of conductive resist, where the charging effect can be restrained effectively. The overlay and direct writing with the electron beam lithography system can be routinely processed on the insulating substrate with isolated metal patterns. The phase array devices can be successfully developed by using the conductive resist layer. The process is easily performed, green as it uses a water solution, and has a low cost. Particularly, it is compatible to the semiconductor process in a clean room.

3.3 Charging effect restrained using conductive polymer layers on various insulating substrates

Figure 10 shows the exposure result of substrate 3# with a thick layer of conductive resist above the PMMA directly. From Fig. 10, it can be obtained that whether the insulating substrate with isolated metal patterns, or directly insulating the substrate, the charging effect can be restrained effectively by applying a thick layer of conductive resist. It can provide a broad scope in the device development on an insulating substrate, such as high density biochips, flexible electronics and liquid crystal display screens.

Therefore, through the three sets of experiments, it can be obtained that after the first exposure process, the major factor of solving the charge accumulation on an insulating substrate in high-energy electron beam lithography is the conductive resist rather than the metal pattern.

The charging effect, which could induce the pattern distortion of a PMMA resist on glass is investigated at the high electron beam energy of 100 keV. This paper presents a new method, which uses a conductive resist containing conductive particles to restrain the charging effect on the insulating substrate. This method is particularly suitable for the semiconductor process, which is not compatible with the metal conductive layer in electron beam lithography. The results show that, either on the insulating substrate with an isolated metal pattern, or on the insulating substrate directly, the charging effect can be restrained effectively by using this method. This technology has been successfully applied to the fabrication of a multi-phased driving electrode device, and has solved the problem of the charging effect in high energy electron beam lithography on an insulating substrate.



[1]
Duan H, Winston D, Yang J K W, et al. Sub-10-nm half-pitch electron-beam lithography by using poly (methyl methacrylate) as a negative resist. J Vac Sci Technol B, 2010, 28(6):C6C58 doi: 10.1116/1.3501353
[2]
Grigorescu A E, Hagen C W. Resists for sub-20-nm electron beam lithography with a focus on HSQ:state of the art. Nanotechnology, 2009, 20(29):292001 doi: 10.1088/0957-4484/20/29/292001
[3]
Cord B, Yang J, Duan H, et al. Limiting factors in sub-10 nm scanning-electron-beam lithography. J Vac Sci Technol B, 2009, 27:2616 doi: 10.1116/1.3253603
[4]
Ma S, Con C, Yavuz M, et al. Polystyrene negative resist for high-resolution electron beam lithography. Nanoscale Research Letters, 2011, 6(1):1 doi: 10.1186/1556-276X-6-446
[5]
Ren Liming, Wang Wenping, Chen Baoqin, et al. Microfabrication of nano-scale feature lines. Journal of Semiconductors, 2004, 25(12):1722 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?flag=1&file_no=08032601&journal_id=bdtxbcn
[6]
Xie C Q, Zhu X L, Li H L, et al. Fabrication of X-ray diffractive optical elements for laser fusion applications. Opt Eng, 2013, 52(3):033402 doi: 10.1117/1.OE.52.3.033402
[7]
Wilson G, Evans A, Dennison J R. Electron energy dependent charging effects of multilayered dielectric materials. Bulletin of the American Physical Society, 2011:56 http://adsabs.harvard.edu/abs/2013ITPS...41.3536W
[8]
Murakawa S, McVittie J P. Mechanism of surface charging effects on etching profile defects. Jpn J Appl Phys, 1994, 33(part 1):2184 doi: 10.1143/JJAP.33.2184
[9]
Fakhfakh S, Jbara O, Fakhfakh Z. Charge transport and behavior analysis with electron irradiated (PMMA). IEEE Conference on Electrical Insulation and Dielectric Phenomena, 2009:441
[10]
Joo J, Chow B Y, Jacobson J M. Nanoscale patterning on insulating substrates by critical energy electron beam lithography. Nano Lett, 2006, 6(9):2021 doi: 10.1021/nl061211q
[11]
Satyalakshmi K M, Olkhovets A, Metzler M G, et al. Charge induced pattern distortion in low energy electron beam lithography. J Vac Sci Technol B, 2000, 18(6):3122 doi: 10.1116/1.1321755
[12]
Liu J, Li Q, Ren M, et al. Graphene as discharge layer for electron beam lithography on insulating substrate. Appl Phys Lett, 2013, 103(113107):1 http://adsabs.harvard.edu/abs/2013ApPhL.103k3107L
[13]
Bailey T C, Resnick D J, Mancini D, et al. Template fabrication schemes for step and flash imprint lithography. Microelectron Eng, 2002, 61/62:461 doi: 10.1016/S0167-9317(02)00462-8
[14]
Dylewicz R, Lis S, De La Rue R M, et al. Charge dissipation layer based on conductive polymer for electron-beam patterning of bulk zinc oxide. Electron Lett, 2010, 46(14):1025 doi: 10.1049/el.2010.1282
[15]
Muhammad M, Buswell S C, Dew S K, et al. Nanopatterning of PMMA on insulating surfaces with various anti-charging, schemes using 30 keV electron beam lithography. J Vac Sci Technol B, 2011, 29(06F304):1
[16]
Wang Ying, Han Weihua, Yang Xiang, et al. An efficient dose-compensation method for proximity effect correction. Journal of Semiconductors, 2010, 31(8):086001 doi: 10.1088/1674-4926/31/8/086001
[17]
Satyalakshmi K M, Olkhovets A, Metzler M G, et al. Charge induced pattern distortion in low energy electron beam lithography. J Vac Sci Technol B, 2000, 18(6):3122 doi: 10.1116/1.1321755
Fig. 1.  Discharge phenomenon and lines distortion of photoresist caused by the charging effect in high energy electron beam lithography on insulating substrate

DownLoad: Full-Size Img PowerPoint
Fig. 2.  Schematic process flow diagram of insulating substrate 1# coated with charge dissipating metal layer and PMMA resist

DownLoad: Full-Size Img PowerPoint
Fig. 3.  Schematic process flow diagram of insulating substrate 2# coated with a metal layer, PMMA resist and conductive polymer layer

DownLoad: Full-Size Img PowerPoint
Fig. 4.  Schematic process flow diagram of insulating substrate 3# coated with PMMA resist and conductive polymer layer

DownLoad: Full-Size Img PowerPoint
Fig. 5.  Distortion of main field exposure caused by the charging effect on an insulating substrate, where the stitching error reaches several microns. (a) The test pattern for the experiment, which includes a line group with a different width and rectangle area with different dimensions. (b) Part of an enlarged view of the distortions of exposure of the main fields and lines. (c) Part of an enlarged view of the distortion of a line with a 1 μm width; the line is divided into four lines. (d) Distortion of a rectangular pattern of 14 × 12 μm2. (e) Part of an enlarged view of (d)

DownLoad: Full-Size Img PowerPoint
Fig. 6.  Schematic of the exposure main field and the distortion of test pattern. (a) The division of the exposure main field. (b) Part of an enlarged view of each main field. (c) Distortion of a line with 1 μm width. (d), (e) Schematics of the test pattern in Fig. 5(c).

DownLoad: Full-Size Img PowerPoint
Fig. 7.  Simulation analysis of the quantity of accumulated charge with different accelerating voltages.

DownLoad: Full-Size Img PowerPoint
Fig. 8.  Example of distortion and stitching error of main field exposure caused by the charging effect on insulating substrate. (a) Exposure result of insulating substrate 1# without conductive resist. (b), (c), (d) Part of an enlarged SEM view of (a). (e) Exposure result of insulating substrate 2# with a thin layer conductive resist. The immersed time of the conductive resist in DI water is 1 min.

DownLoad: Full-Size Img PowerPoint
Fig. 9.  Exposure result of substrate 2# with a thick layer of conductive resist after being immersed in DI water for 10 min

DownLoad: Full-Size Img PowerPoint
Fig. 10.  (a) Exposure result of substrate 3# with a thick layer of conductive resist above the PMMA directly. (b), (c), (f) Part of the enlarged view of (a), where the designed width of the line group from left to right is 1--10 nm respectively in (b). (d), (e) Enlarged views of (c) and (f) respectively, where the designed line width is 1 μm in (d)

DownLoad: Full-Size Img PowerPoint
[1]
Duan H, Winston D, Yang J K W, et al. Sub-10-nm half-pitch electron-beam lithography by using poly (methyl methacrylate) as a negative resist. J Vac Sci Technol B, 2010, 28(6):C6C58 doi: 10.1116/1.3501353
[2]
Grigorescu A E, Hagen C W. Resists for sub-20-nm electron beam lithography with a focus on HSQ:state of the art. Nanotechnology, 2009, 20(29):292001 doi: 10.1088/0957-4484/20/29/292001
[3]
Cord B, Yang J, Duan H, et al. Limiting factors in sub-10 nm scanning-electron-beam lithography. J Vac Sci Technol B, 2009, 27:2616 doi: 10.1116/1.3253603
[4]
Ma S, Con C, Yavuz M, et al. Polystyrene negative resist for high-resolution electron beam lithography. Nanoscale Research Letters, 2011, 6(1):1 doi: 10.1186/1556-276X-6-446
[5]
Ren Liming, Wang Wenping, Chen Baoqin, et al. Microfabrication of nano-scale feature lines. Journal of Semiconductors, 2004, 25(12):1722 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?flag=1&file_no=08032601&journal_id=bdtxbcn
[6]
Xie C Q, Zhu X L, Li H L, et al. Fabrication of X-ray diffractive optical elements for laser fusion applications. Opt Eng, 2013, 52(3):033402 doi: 10.1117/1.OE.52.3.033402
[7]
Wilson G, Evans A, Dennison J R. Electron energy dependent charging effects of multilayered dielectric materials. Bulletin of the American Physical Society, 2011:56 http://adsabs.harvard.edu/abs/2013ITPS...41.3536W
[8]
Murakawa S, McVittie J P. Mechanism of surface charging effects on etching profile defects. Jpn J Appl Phys, 1994, 33(part 1):2184 doi: 10.1143/JJAP.33.2184
[9]
Fakhfakh S, Jbara O, Fakhfakh Z. Charge transport and behavior analysis with electron irradiated (PMMA). IEEE Conference on Electrical Insulation and Dielectric Phenomena, 2009:441
[10]
Joo J, Chow B Y, Jacobson J M. Nanoscale patterning on insulating substrates by critical energy electron beam lithography. Nano Lett, 2006, 6(9):2021 doi: 10.1021/nl061211q
[11]
Satyalakshmi K M, Olkhovets A, Metzler M G, et al. Charge induced pattern distortion in low energy electron beam lithography. J Vac Sci Technol B, 2000, 18(6):3122 doi: 10.1116/1.1321755
[12]
Liu J, Li Q, Ren M, et al. Graphene as discharge layer for electron beam lithography on insulating substrate. Appl Phys Lett, 2013, 103(113107):1 http://adsabs.harvard.edu/abs/2013ApPhL.103k3107L
[13]
Bailey T C, Resnick D J, Mancini D, et al. Template fabrication schemes for step and flash imprint lithography. Microelectron Eng, 2002, 61/62:461 doi: 10.1016/S0167-9317(02)00462-8
[14]
Dylewicz R, Lis S, De La Rue R M, et al. Charge dissipation layer based on conductive polymer for electron-beam patterning of bulk zinc oxide. Electron Lett, 2010, 46(14):1025 doi: 10.1049/el.2010.1282
[15]
Muhammad M, Buswell S C, Dew S K, et al. Nanopatterning of PMMA on insulating surfaces with various anti-charging, schemes using 30 keV electron beam lithography. J Vac Sci Technol B, 2011, 29(06F304):1
[16]
Wang Ying, Han Weihua, Yang Xiang, et al. An efficient dose-compensation method for proximity effect correction. Journal of Semiconductors, 2010, 31(8):086001 doi: 10.1088/1674-4926/31/8/086001
[17]
Satyalakshmi K M, Olkhovets A, Metzler M G, et al. Charge induced pattern distortion in low energy electron beam lithography. J Vac Sci Technol B, 2000, 18(6):3122 doi: 10.1116/1.1321755
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    Mingyan Yu, Shirui Zhao, Yupeng Jing, Yunbo Shi, Baoqin Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. Journal of Semiconductors, 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002
    M Y Yu, S R Zhao, Y P Jing, Y B Shi, B Q Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. J. Semicond., 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002.
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    Received: 26 March 2014 Revised: 26 June 2014 Online: Published: 01 December 2014

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      Article Navigation >  Journal of Semiconductors  > 2014  >  35(12): 126002
      Mingyan Yu, Shirui Zhao, Yupeng Jing, Yunbo Shi, Baoqin Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. Journal of Semiconductors, 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002 ****M Y Yu, S R Zhao, Y P Jing, Y B Shi, B Q Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. J. Semicond., 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002.
      Citation:
      Mingyan Yu, Shirui Zhao, Yupeng Jing, Yunbo Shi, Baoqin Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. Journal of Semiconductors, 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002 ****
      M Y Yu, S R Zhao, Y P Jing, Y B Shi, B Q Chen. A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography[J]. J. Semicond., 2014, 35(12): 126002. doi: 10.1088/1674-4926/35/12/126002.
      shu

      A method to restrain the charging effect on an insulating substrate in high energy electron beam lithography

      DOI: 10.1088/1674-4926/35/12/126002
      • 1.

        The Higher Educational Key Laboratory for Measuring & Control Technology and Instrumentations of Heilongjiang Province, Harbin University of Science and Technology, Harbin 150080, China

      • 2.

        Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China

      Funds:

      Project supported by the National Natural Science Foundation of China (No. 61475079) and the National Major Scientific Equipment Developed Special (No. 2011YQ4013608)

      the National Natural Science Foundation of China 61475079

      the National Major Scientific Equipment Developed Special 2011YQ4013608

      More Information
      • Corresponding author: Yu Mingyan, Email:yumingyan@ime.ac.cn
      • Received Date: 2014-03-26
      • Revised Date: 2014-06-26
      • Published Date: 2014-12-01

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