J. Semicond. > 2015, Volume 36 > Issue 11 > 111002
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Modeling and simulation of single-event effect in CMOS circuit

Suge Yue1, 2, , Xiaolin Zhang1, Yuanfu Zhao2 and Lin Liu2

+ Author Affiliations

 Corresponding author: Yue Suge, Email: yuesg9999@163.com

DOI: 10.1088/1674-4926/36/11/111002

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Abstract: This paper reviews the status of research in modeling and simulation of single-event effects (SEE) in digital devices and integrated circuits. After introducing a brief historical overview of SEE simulation, different level simulation approaches of SEE are detailed, including material-level physical simulation where two primary methods by which ionizing radiation releases charge in a semiconductor device (direct ionization and indirect ionization) are introduced, device-level simulation where the main emerging physical phenomena affecting nanometer devices (bipolar transistor effect, charge sharing effect) and the methods envisaged for taking them into account are focused on, and circuit-level simulation where the methods for predicting single-event response about the production and propagation of single-event transients (SETs) in sequential and combinatorial logic are detailed, as well as the soft error rate trends with scaling are particularly addressed.

Key words: single event effect (SEE), charge collection, single event upset (SEU), multi-node upset (MNU)



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Fig. 1.  (Color online) A complete suite methodology for SEE simulation. The methodology includes GDS to a material-level physical simulation,device simulation,circuit-level simulation and on-orbit error-rate prediction.

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Fig. 2.  Charge collection mechanism in a reverse-biased pn junction.

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Fig. 3.  Electron concentration contours inside an n-channel MOS transistor following a heavy ion strike[22]. Bipolar effect is evidenced by the contours emanating from the source,showing that the source is injecting electrons into the p-well,where they may be collected at the substrate or at the drain.

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Fig. 4.  (a) Schematic of SPICE simulation circuit. (b) Schematic of SEU current.

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Fig. 5.  Linear energy transfer (LET) versus depth curve for 210-MeV chlorine ions in silicon.

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Fig. 6.  (Color online) Three scenarios of SEU caused by elastic scattering of 1 GeV Ne ions. The red,green and blue tracks are incident ion,recoil and scattered ion,respectively.

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Fig. 7.  Mixed-mode simulation structure for SRAM cells. Illustration is of an n-channel "off" drain strike.

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Fig. 8.  (Color online) Electron concentration contours inside an n-channel MOS transistor at (a) 0.5 ps and (b) 0.1 ns,respectively[3]. Charge induced by incident ion diffusion to the second node where enough charge is collected.

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Fig. 9.  (Color online) (a) Layout of 256K six-transistor SRAM unit cell (D $=$ drain and S $=$ source). Red box indicates the boundaries of the unit cell,green regions are the gate polysilicon lines,and blue lines show the interconnections within the unit cell. (b) View of 3-D unit cell as laid out in device simulator. Mesh size is approximately 100 000 points[64].

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Fig. 10.  (Color online) A complete Suite methodology for SEU simulation. The methodology includes GDS to an entire SRAM cell 3-D physical mesh,particle event generation,particle (TCAD) simulations and statistical analysis[71].

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.  (Color online) Full-cell simulations to get a map of the SEU-sensitive area of the SRAM unit cell[71].

Figure 11.


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Fig. 12.  (Color online) SOCFIT modules and environment[51].

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Fig. 13.  (Color online) Overview of the global approach integrating MUSCA SEP$^{3}$ and electrical simulations.

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Table 1.   Abilities of different fault injection techniques.

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    Received: 11 June 2015 Revised: Online: Published: 01 November 2015

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      Article Navigation >  Journal of Semiconductors  > 2015  >  36(11): 111002
      Suge Yue, Xiaolin Zhang, Yuanfu Zhao, Lin Liu. Modeling and simulation of single-event effect in CMOS circuit[J]. Journal of Semiconductors, 2015, 36(11): 111002. doi: 10.1088/1674-4926/36/11/111002 ****S G Yue, X L Zhang, Y F Zhao, L Liu. Modeling and simulation of single-event effect in CMOS circuit[J]. J. Semicond., 2015, 36(11): 111002. doi: 10.1088/1674-4926/36/11/111002.
      Citation:
      Suge Yue, Xiaolin Zhang, Yuanfu Zhao, Lin Liu. Modeling and simulation of single-event effect in CMOS circuit[J]. Journal of Semiconductors, 2015, 36(11): 111002. doi: 10.1088/1674-4926/36/11/111002 ****
      S G Yue, X L Zhang, Y F Zhao, L Liu. Modeling and simulation of single-event effect in CMOS circuit[J]. J. Semicond., 2015, 36(11): 111002. doi: 10.1088/1674-4926/36/11/111002.
      shu

      Modeling and simulation of single-event effect in CMOS circuit

      DOI: 10.1088/1674-4926/36/11/111002
      • 1.

        Beijing University of Aeronautics & Astronautics, Beijing 100191, China

      • 2.

        Beijing Microelectronics Technology Institute, Beijing 100076, China

      More Information
      • Corresponding author: Yue Suge, Email: yuesg9999@163.com
      • Received Date: 2015-06-11
      • Accepted Date: 2015-07-23
      • Published Date: 2015-01-25

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