Processing math: 100%
J. Semicond. > 2015, Volume 36 > Issue 2 > 025001

SEMICONDUCTOR INTEGRATED CIRCUITS

Low phase noise GaAs HBT VCO in Ka-band

Ting Yan, Yuming Zhang, Hongliang Lü, Yimen Zhang, Yue Wu and Yifeng Liu

+ Author Affiliations

 Corresponding author: Hongliang Lü, E-mail: hllv@mail.xidian.edu.cn

DOI: 10.1088/1674-4926/36/2/025001

PDF

Abstract: Design and fabrication of a Ka-band voltage-controlled oscillator (VCO) using commercially available 1-μm GaAs heterojunction bipolar transistor technology is presented. A fully differential common-emitter configuration with a symmetric capacitance with a symmetric inductance tank structure is employed to reduce the phase noise of the VCO, and a novel π-feedback network is applied to compensate for the 180° phase shift. The on-wafer test shows that the VCO exhibits a phase noise of —96.47 dBc/Hz at a 1 MHz offset and presents a tuning range from 28.312 to 28.695 GHz. The overall dc current consumption of the VCO is 18 mA with a supply voltage of -6 V. The chip area of the VCO is 0.7 × 0.7 mm2.

Key words: VCOGaAs HBTcommon-emitterphase noiseπ -feedback

The integrated voltage controlled oscillator (VCO) is widely used in various system blocks to accomplish predominant radio frequency communication systems[1]. Among the specifications, such as the phase noise, the tuning range, the dc power consumption and the output power, phase noise is a prime criterion to evaluate the performance of the VCO. The phase noise of a VCO near carrier frequency typically depends on the quality factor (Q) of the LC tank used in the oscillator and the noise of the active devices. The flicker noise (1/f) of the GaAs HBT device is better than that of the CMOS or HEMT device[2]. Furthermore, GaAs HBT is very attractive to be used for millimeter wave applications due to its reliable fabrication process and lower manufacturing cost. Therefore, the GaAs HBT technology is generally considered as a good choice for low phase noise VCO design. Differential topology is generally used instead of the single-ended one to reduce common node noise for VCO, even though it requires more elements. Besides, differential structure offers high loop gain, making it a common method to design differential VCO in radio frequency integrated circuits (RFICs).

Another important determinate factor of phase noise is the amplification configuration of active devices. The common-emitter (CE) is a more favorable configuration due to its moderate input impedance and large output impedance[3]. In addition, it also has the highest gain compared with the common-base (CB) configuration or common-collector (CC) configuration. However, the CE configuration has a 180 phase shift between the base and the collector, thus a feedback network must be inserted to compensate for the phase shift. One method is to adopt a classical cross-coupled structure[4], while another is to use a π-feedback network, which consists of capacitors and inductors. Unlike the construction described in Reference [5], a novel π-feedback structure is employed in this design. It has a significant advantage over the former one in both technology sensitivity and quality factor (Q).

In this paper, a differential LC VCO with a novel topology using a π-feedback network and CE configuration is designed and fabricated using 1-μm GaAs HBT technology from the WIN semiconductors. The on-wafer test shows that the phase noise of the proposed VCO can achieve 96.47 dBc/Hz at 1~MHz offset from the 28.633 GHz carrier frequency. Since the VCO plays a crucial role in the phase-locked loop (PLL), the successful fabrication of the designed VCO is of great importance on building a PLL operation at the Ka band.

The HBT device, fabricated by the WIN semiconductors 1-μm GaAs HBT process, typically exhibits a maximum unit current gain frequency (fT) of 75 GHz, and a maximum unit power gain frequency (fmax) of 80 GHz, which has a vertical structure and a vertical current flow. It is designed by using a hetero-junction between the emitter and the base with a high base doping and a thin base thickness, leading to a high cut-off frequency. This makes the device possibly achieve a fast speed, high transconductance, high linearity and low power consumption, which are good for VCO circuit application. Passive components, including the metal-insulator-metal (MIM) capacitor, micro-strip line, thin film resistor, two metal layers, and back side via holes are also available in the process.

The basic building block of the π-feedback VCO is shown in Figure 1, in which the common-emitter (CE) configuration is adopted. The π-network consists of Lb, Lc, and C is performed as a feedback path.

Figure  1.  Diagram of single-ended VCO with CE configuration and π-networks.

The proposed differential π-feedback VCO is shown in Figure 2, in which two CE configuration π-networks are adopted. In order to realize a high Q factor, the core of the VCO with AIT (asymmetric inductance tank) and SIT (symmetric inductance tank) will be considered. The Q factor can be expressed as

QTank=RPω0L,(1)
where RP is the parallel resistance of the LC tank at the resonant frequency (ω0), and L is the inductance of the tank. In view of the layout, the area of the AIT is bigger than the SIT, which will seriously affect the chip size. The inductance of the AIT is bigger than the SIT, because the inductance is proportional to the area of the inductors. ω0 depends on the center carrier frequency, therefore, it will be almost the same in both the AIT and the SIT[6]. Thus, the Q factor of the SIT is definitely superior to the AIT. As to the capacitor, the wave shape of the core stage with asymmetric capacitance has a little distortion in the headroom[7]; the way to eliminate the headroom distortion is to use symmetric capacitance in the SIT structure called SCSIT.

Figure  2.  Schematic of the differential π-feedback VCO.

In order to improve the oscillation frequency and reduce the chip size, two micro-strip lines, instead of conventional spiral inductors, are used in the π-network. Two transistors in parallel act as a varactor to obtain a broad tuning range. The oscillation frequency can be calculated by

f=12π(Lc1+Lc2+Lb)(Cbc+Ctune),(2)
where Lc1 and Lc2 are the inductances of the feedback inductor at the collector. Lb is the inductance at the base. Cbc is the capacitance of the base-collector (BC) junction of transistor M. Ctune is a varactor array composed of eight reverse biased barrier capacitors.

To achieve a wide tuning range, the varactor must contribute to a larger fraction of the total tank capacitance[8]. The input and output impedances of the π-network are determined by the value of Lc1, Lc2 and Lb. Furthermore, a high C and a low L result in a high Q value, which benefit phase noise performance[9], as indicated in Equation (3)[10]. Thus, a tradeoff must be taken into consideration among the oscillation frequency, impedance match, frequency tuning range and phase noise[11].

L(Δω)=10lg[2KTPsig(ω02QtankΔω)2].

(3)

The differential output signals are taken from the emitters to avoid direct connection between the LC tank and the load. Since the differential output ports are at the emitters, the oscillation transistors acting as power suppliers and amplifiers are also performing as buffer stages themselves. Two small capacitors are applied at output nodes for dc decoupling and to further reduce the effect of outside load on the VCO.

All of the passive components, such as micro-strip lines, DC-block and bypass capacitors, were simulated with a full-wave EM simulator. Based on the transient and harmonic simulations using an Agilent advanced design system (ADS), a layout of the designed VCO was accomplished with the Virtuoso layout in Cadence. After rule checking and electromagnetic (EM) simulation, the designed VCO was fabricated using the 1-μm GaAs HBT process of the WIN semiconductors. The micrograph of the designed VCO is shown in Figure 3 with a chip size of 0.7 × 0.7 mm2. All the devices are arranged symmetrically to have a differential output without the common node noise effect.

Figure  3.  Micrograph of the fabricated differential π-feedback VCO.

The measurements were performed using an Agilent power spectrum analyzer N9030A in the Institute of Microelectronics of the Chinese Academy of Sciences. A three-needle probe ground-signal-ground (GSG) was adopted as the output of the high frequency signal. The total dc current consumption of the VCO is 18 mA with a supply voltage of 6 V. A high supply voltage is provided to obtain a high voltage swing, which is helpful to improve the phase noise performance.

Figure 4 illustrates the output spectrum of the VCO with a control voltage of 4 V. The maximum output power of the VCO is -7.34 dBm at the output GSG pad. The oscillation frequency variation as a function of control voltage sweep is plotted in Figure 5. The tuning frequency is varied from 28.695 to 28.312 GHz with a control voltage from 5.5 to 0~V. The simulated and measured phase noise characteristics of the differential π-feedback VCO are respectively depicted in Figures 6(a) and 6(b). As shown in Figure 6(b), a phase noise of 96.47~dBc/Hz at a 1 MHz offset is observed at the 28.633~GHz oscillation frequency. It seems that the phase noise performance is poorer than the simulated result of 103.9~dBc/Hz at 1 MHz. One possible reason is that all the passive elements and wirings were modeled by 2.5-D electromagnetic simulations of the momentum EM simulator in Agilent's advanced design system (ADS), in which its algorithm is not precise enough. Another reason may be that the substrate in the library is not entirely the same as our samples, so it may result in the difference between the simulation and measurement. Besides, some parasitic effects may be produced when the probe is in contact with the tested chip, which was not considered in the simulation. The parasitic effects, including parasitic capacitors and inductors, will bring in additional losses, which will reduce the output power of the VCO. According to Equation (3), the phase noise of the tested VCO increases with the reducing of the output power Psig. Based on the above analysis, the existence of the parasitic effects will bring down the phase noise performance.

Figure  4.  The measured output spectrum of the VCO.
Figure  5.  The measured output frequency versus the tuning range.
Figure  6.  (a) The simulated phase noise of the proposed VCO. (b) The measured phase noise of the proposed VCO.

To improve the simulation accuracy of the VCO, simulation software with high algorithm accuracy, such as fast-cap and Fast-Henry, could be utilized to get a more precise simulation of the capacitors and inductors. Meanwhile, some capacitors and inductors should be introduced between the output and the termination load to represent the parasitic effects produced by the contact between the probe and the tested chip. In addition, the target should be designed to be higher than the expected value to leave a certain margin for the difference between the simulation and the measurement result. Thus the final performance will still be able to meet the demand with the existence of the parasitic effects. To enhance the performance of the VCO, more interconnection layers can be used to shorten the critical feedback path and signal paths, which can further reduce the parasitic effects. Table 1 lists the performance of several previously reported VCOs. It demonstrates that the proposed VCO has superior phase noise performance compared with the other reported results.

Table  1.  Comparisons of several previously reported VCOs and this work.
DownLoad: CSV  | Show Table

The design and fabrication of a Ka-band π-feedback VCO using 1-μm GaAs HBT technology have been presented in this paper. Low phase noise performance has been realized by using a balanced CE configuration with a novel π-feedback network. This topology reduces the load of the tank from the active devices and compensates for the 180 phase shift with a π-network. The measurement result shows that a phase noise of 96.47 dBc/Hz at the 1 MHz offset is obtained. The dc current consumption is 18 mA with a supply voltage of 6~V. The maximum output power is 7.34 dBm. Furthermore, the GaAs HBT device with its excellent ability to handle higher frequencies than the Si-based device is a preferred technology to implement wireless applications for the military and civil service.



[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
Fig. 1.  Diagram of single-ended VCO with CE configuration and π-networks.

Fig. 2.  Schematic of the differential π-feedback VCO.

Fig. 3.  Micrograph of the fabricated differential π-feedback VCO.

Fig. 4.  The measured output spectrum of the VCO.

Fig. 5.  The measured output frequency versus the tuning range.

Fig. 6.  (a) The simulated phase noise of the proposed VCO. (b) The measured phase noise of the proposed VCO.

DownLoad: CSV
DownLoad: CSV

Table 1.   Comparisons of several previously reported VCOs and this work.

DownLoad: CSV
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
1

Wide band low phase noise QVCO based on superharmonic injection locking

Yalan Xu, Jinguang Jiang, Jianghua Liu

Journal of Semiconductors, 2016, 37(1): 015002. doi: 10.1088/1674-4926/37/1/015002

2

A low phase noise and low spur PLL frequency synthesizer for GNSS receivers

Sen Li, Jinguang Jiang, Xifeng Zhou, Jianghua Liu

Journal of Semiconductors, 2014, 35(1): 015004. doi: 10.1088/1674-4926/35/1/015004

3

Design optimizations of phase noise, power consumption and frequency tuning for VCO

Nan Chen, Shengxi Diao, Lu Huang, Xuefei Bai, Fujiang Lin, et al.

Journal of Semiconductors, 2013, 34(9): 095009. doi: 10.1088/1674-4926/34/9/095009

4

Design of a CMOS multi-mode GNSS receiver VCO

Long Qiang, Zhuang Yiqi, Yin Yue, Li Zhenrong

Journal of Semiconductors, 2012, 33(5): 055003. doi: 10.1088/1674-4926/33/5/055003

5

An on-chip temperature compensation circuit for an InGaP/GaAs HBT RF power amplifier

Li Chengzhan, Chen Zhijian, Huang Jiwei, Wang Yongping, Ma Chuanhui, et al.

Journal of Semiconductors, 2011, 32(3): 035009. doi: 10.1088/1674-4926/32/3/035009

6

A low-phase-noise digitally controlled crystal oscillator for DVB TV tuners

Zhao Wei, Lu Lei, Tang Zhangwen

Journal of Semiconductors, 2010, 31(7): 075003. doi: 10.1088/1674-4926/31/7/075003

7

A 2.4 GHz high-linearity low-phase-noise CMOS LC-VCO based on capacitance compensation

Li Zhenrong, Zhuang Yiqi, Li Bing, Jin Gang, Jin Zhao, et al.

Journal of Semiconductors, 2010, 31(7): 075005. doi: 10.1088/1674-4926/31/7/075005

8

A 4.2–5 GHz, low phase noise LC-VCO with constant bandwidth and small tuning gain

Xu Conghui, Xi Jingtian, Lu Lei, Yang Yuqing, Tan Xi, et al.

Journal of Semiconductors, 2009, 30(9): 095002. doi: 10.1088/1674-4926/30/9/095002

9

An enhanced close-in phase noise LC-VCO using parasitic V-NPN transistors in a CMOS process

Gao Peijun, Oh N J, Min Hao

Journal of Semiconductors, 2009, 30(8): 085004. doi: 10.1088/1674-4926/30/8/085004

10

A VCO sub-band selection circuit for fast PLL calibration

Song Ying, Wang Yuan, Jia Song, Zhao Baoying

Journal of Semiconductors, 2009, 30(8): 085010. doi: 10.1088/1674-4926/30/8/085010

11

A 6 GHz high power and low phase noise VCO using an InGaP/GaAs HBT

Wang Xiantai, Shen Huajun, Jin Zhi, Chen Yanhu, Liu Xinyu, et al.

Journal of Semiconductors, 2009, 30(2): 025005. doi: 10.1088/1674-4926/30/2/025005

12

A 3GHz Low-Power and Low-Phase-Noise LC VCO with a Self-Biasing Current Source

Chen Pufeng, Li Zhiqiang, Huang Shuilong, Zhang Haiying, Ye Tianchun, et al.

Journal of Semiconductors, 2008, 29(11): 2106-2109.

13

A 12~18GHz Wide Band VCO Based on Quasi-MMIC

Wang Shaodong, Gao Xuebang, Wu Hongjiang, Wang Xiangwei, Mo Lidong, et al.

Journal of Semiconductors, 2008, 29(1): 63-68.

14

Design of a 2.5GHz Low Phase-Noise LC-VCO in 0.35μm SiGe BiCMOS

Zhang Jian, Chen Liqiang, Li Zhiqiang, Chen Pufeng, Zhang Haiying, et al.

Journal of Semiconductors, 2008, 29(5): 827-831.

15

A Monolithic InGaP/GaAs HBT VCO for 5GHz Wireless Applications

Chen Liqiang, Zhang Jian, Li Zhiqiang, Chen Pufeng, Zhang Haiying, et al.

Chinese Journal of Semiconductors , 2007, 28(6): 823-828.

16

A 2GHz Low Power Differentially Tuned CMOS Monolithic LC-VCO

Zhang Li, Chi Baoyong, Yao Jinke, Wang Zhihua, Chen Hongyi, et al.

Chinese Journal of Semiconductors , 2006, 27(9): 1543-1547.

17

CMOS Implementation of a Wideband Low Phase Noise PLL Frequency Synthesizer

Chen Zuotian, Wu Xuan, Tang Shoulong, Wu Jianhui

Chinese Journal of Semiconductors , 2006, 27(10): 1838-1843.

18

Design of a Monolithic CMOS LC-Voltage Controlled Oscillator with Low Phase Noise for 4GHz Frequency Synthesizers

Tang Lu, Wang Zhigong, Huang Ting, Li Zhiqun

Chinese Journal of Semiconductors , 2006, 27(3): 459-466.

19

An Ultra Wideband VHF CMOS LC VCO

Ning Yanqing, Wang Zhihua, Chen Hongyi

Chinese Journal of Semiconductors , 2006, 27(1): 14-18.

20

30GHz PHEMT Oscillator

Wu Ahui

Chinese Journal of Semiconductors , 2005, 26(S1): 252-255.

1. Wu, Y., Lv, H., Zhang, Y. et al. Analysis and Design of a Broadband Frequency Divider Using Modified Active Loads in GaAs HBT. Journal of Circuits, Systems and Computers, 2018, 27(3): 1850039. doi:10.1142/S0218126618500391
  • Search

    Advanced Search >>

    GET CITATION

    Ting Yan, Yuming Zhang, Hongliang Lü, Yimen Zhang, Yue Wu, Yifeng Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. Journal of Semiconductors, 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001
    T Yan, Y M Zhang, H Lü, Y M Zhang, Y Wu, Y F Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. J. Semicond., 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001.
    shu

    Export: BibTex EndNote

    Article Metrics

    Article views: 2776 Times PDF downloads: 29 Times Cited by: 1 Times

    History

    Received: 03 July 2014 Revised: Online: Published: 01 February 2015

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Ting Yan, Yuming Zhang, Hongliang Lü, Yimen Zhang, Yue Wu, Yifeng Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. Journal of Semiconductors, 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001 ****T Yan, Y M Zhang, H Lü, Y M Zhang, Y Wu, Y F Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. J. Semicond., 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001.
      Citation:
      Ting Yan, Yuming Zhang, Hongliang Lü, Yimen Zhang, Yue Wu, Yifeng Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. Journal of Semiconductors, 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001 ****
      T Yan, Y M Zhang, H Lü, Y M Zhang, Y Wu, Y F Liu. Low phase noise GaAs HBT VCO in Ka-band[J]. J. Semicond., 2015, 36(2): 025001. doi: 10.1088/1674-4926/36/2/025001.

      Low phase noise GaAs HBT VCO in Ka-band

      DOI: 10.1088/1674-4926/36/2/025001
      Funds:

      Project supported by the National Key Basic Research Program of China (No. 2010CB327505), the Advanced Research Project (No. 51308xxxx06), and the Advanced Research Foundation (No. 9140A08xxxx11DZ111).

      More Information
      • Corresponding author: E-mail: hllv@mail.xidian.edu.cn
      • Received Date: 2014-07-03
      • Accepted Date: 2014-08-06
      • Published Date: 2015-01-25

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return