A low power wide tuning range baseband filter for multistandard transceivers

Zhiqing Geng; Nanjian Wu

doi:10.1088/1674-4926/36/4/045006

J. Semicond. > 2015, Volume 36 > Issue 4 > 045006

SEMICONDUCTOR INTEGRATED CIRCUITS

A low power wide tuning range baseband filter for multistandard transceivers

Zhiqing Geng^1, and Nanjian Wu²

+ Author Affiliations

Corresponding author: Zhiqing Geng, E-mail: gengzhiqing@semi.ac.cn

DOI: 10.1088/1674-4926/36/4/045006

Abstract: This paper presents the design and implementation of a low power wide tuning range baseband filter with an accurate on-chip tuning circuit for reconfigurable multistandard wireless transceivers. The realized low pass filter (LPF) is a six-order Butterworth type by cascading three stage active-G_m-RC biquadratic cells. A modified linearization technique is used to improve the filter linearity performance at low power consumption. A new process-independent transconductor matching circuit and a new frequency tuning circuit with frequency compensation are proposed to achieve a high precision filter frequency response. The proposed LPF is realized in a 130 nm standard CMOS technology. The measured results show that the LPF exhibits a high bandwidth programmability from 0.1 to 25 MHz with a tuning frequency error less than 2.68% over the wide tuning range. The power consumption is scalable, ranging from 0.52 to 5.25 mA, from a 1.2 V power supply while achieving a 26.3 dBm in-band IIP3.

Key words: low power, baseband filter, frequency tuning

References

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Fig. 1. The system architecture of the entire filter.

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Fig. 2. The active-

$G_{\rm m}$ -RC biquadratic cell.

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Fig. 3. The schematic of the R2_array (or R1_array).

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Fig. 4. The schematic of the C1_array and C

$_{\rm C}$ _array.

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Fig. 5. The schematic of the configurable operational amplifier (COA).

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Fig. 6. The schematic of the switchable operational amplifier (SOA).

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Fig. 7. The half equivalent circuit of the biquadratic cell.

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Fig. 8. The differential signal amplitude to the first stage and the second stage of the COA.

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Fig. 9. The simulated results of the third order intermodulation (IM3) distortion.

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Fig. 10. The simulated input referred noise of the entire filter.

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Fig. 11. The schematic of the transconductor matching circuit.

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Fig. 12. The schematic of the

$G_{\rm m}$ unit.

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Fig. 13. The filter frequency response under three conditions.

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Fig. 14. The schematic of the frequency tuning circuit.

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Fig. 15. The schematic of the capacitor array CM_array.

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Fig. 16. The time sequence of the narrow bandwidth tuning mode.

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Fig. 17. The time sequence of the wide bandwidth tuning mode.

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Fig. 18. The simulated frequency response of the entire filter.

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Fig. 19. The half equivalent circuit of the biquadratic cell with parasitic capacitance.

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Fig. 20. The relationship between the filter cutoff frequency and

$N_{\rm on}$ .

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Fig. 21. The chip prototype of the entire filter.

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Fig. 22. The frequency response of the entire filter.

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Fig. 23. The measured cutoff frequency error of the filter.

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Fig. 24. The measured 1 dB compression point of the filter.

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Table 1. Performance summary and comparison to previous work.

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Zhiqing Geng, Nanjian Wu. A low power wide tuning range baseband filter for multistandard transceivers[J]. Journal of Semiconductors, 2015, 36(4): 045006. doi: 10.1088/1674-4926/36/4/045006

Z Q Geng, N J Wu. A low power wide tuning range baseband filter for multistandard transceivers[J]. J. Semicond., 2015, 36(4): 045006. doi: 10.1088/1674-4926/36/4/045006.

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Received: 23 October 2014 Revised: Online: Published: 01 April 2015

This paper presents the design and implementation of a low power wide tuning range baseband filter with an accurate on-chip tuning circuit for reconfigurable multistandard wireless transceivers. The realized low pass filter (LPF) is a six-order Butterworth type by cascading three stage active-G_m-RC biquadratic cells. A modified linearization technique is used to improve the filter linearity performance at low power consumption. A new process-independent transconductor matching circuit and a new frequency tuning circuit with frequency compensation are proposed to achieve a high precision filter frequency response. The proposed LPF is realized in a 130 nm standard CMOS technology. The measured results show that the LPF exhibits a high bandwidth programmability from 0.1 to 25 MHz with a tuning frequency error less than 2.68% over the wide tuning range. The power consumption is scalable, ranging from 0.52 to 5.25 mA, from a 1.2 V power supply while achieving a 26.3 dBm in-band IIP3.

A low power wide tuning range baseband filter for multistandard transceivers

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