1. Introduction
The current conduction through SiO2 gate dielectric is crucial for its successful application in metal–oxide–semiconductor (MOS) devices. Because of the large electron energy barrierΦB at the Si/SiO2 interface and low trap density in the oxide forbidden gap, the dominant current conduction mechanism in silicon based MOS devices was believed to be the electrode-limited conduction[1] via Fowler–Nordheim (FN)[2–5] or direct tunneling (DT)[6] depending on the oxide thickness tox and applied oxide voltage Vox. The electronic current conduction through SiO2 films thicker than 5 nm and at oxide electric fields Eox above 6 MV/cm satisfying Vox > ΦB is widely accepted to be solely due to FN tunneling of electrons from the inversion or accumulation layer of silicon substrate or polysilicon gate through the triangular energy barrier at the cathode/oxide interface[4, 6]. FN tunneling current is a major concern for the reliability of MOS structures as well as for the functionality of electrically erasable programmable read-only memory (EEPROM) devices at room temperature[4] and also at elevated temperatures[7]. Therefore, since early 1970s FN tunneling mechanism has been received much attention by several researchers[2–10].
In earlier reports[2–5], current conduction mechanism through SiO2 dielectric in MOS structures at room temperature was established as the FN tunneling of electrons from the excellent linear fit of the measured ln (JG
JG=AFNE2oxexp(−BFN/Eox), |
(1) |
where JG is the current density, Eox is the oxide electric field, BFN and AFN are FN constants given by[4]
BFN=43√2qmoxΦ3Bℏ2, |
(2) |
AFN=q2mSi16π2ℏΦBmox, |
(3) |
where mox = 0.42m0 and mSi = 0.916m0 are the effective masses of the electron in oxide[2] and in silicon normal to the interface[3], respectively, m0 is the free electron mass,

Furthermore, understanding the current conduction mechanism is crucial in studying hot-electron induced anode hole injection (AHI) and related oxide degradation particularly in thin SiO2 films down to 15 nm as originally proposed by Samanta and co-worker[12, 13] for 4H-SiC devices. The present work is therefore a first time attempt to critically investigate the mechanism(s) of oxide thickness tox dependent current conduction through thin SiO2 films in n+-polySi/SiO2/p-Si diodes at high fields and temperatures with an aim to theoretically study the time-dependent dielectric breakdown (TDDB) in silicon basedMOS devices.
2. Device details
The devices studied here were n+-polySi gate tunnel oxide MOS capacitors having 5.4-, 7-, 9- and 12-nm thick SiO2 films thermally grown on (100) oriented p-Si. Acceptor dopant concentrations of the substrates were 1.2×1015 cm−3 for 5.4-, 7- and 12-nm thick and 6×1017 cm−3 for 9-nm thick SiO2 films, respectively. Phosphorous donor concentration (ND) in n+-polySi gate was 1020 cm−3. Details of device process flow are found elsewhere[8]. Current–voltage measurements were carried out by Hadjadj and co-workers[8] keeping p-Si in accumulation condition (negative bias on n+-polySi gate) at a wide range of temperatures between 25 and 300 °C.
3. Analysis and discussions
3.1 Current conduction mechanism
The excellent fit of the measured[8] JG versus Eox data with the conventional LS Eq. (1) irrespective of oxide thickness and temperature as shown in Fig. 1(a) apparently indicates FN tunneling of electrons to occur from the n+-polySi gate at a wide range of temperatures. However, FN tunneling current density JG modeled by the LS Eq. (1) is essentially oxide thickness independent when considered at a given applied electric field Eox. Therefore, FN tunneling is unlikely the primary conduction mechanism to explain the observed tox dependence of JG at a given applied electric field Eox and temperature in Fig. 1(a). The effective electron barrier height ΦB at the injecting electrode/oxide interface is usually estimated from the slope BFN of the experimental ln(JG/Eox2) versus 1/Eox linear FN plot and using Eq. (2). Both theoretical and experimental results of the temperature variations of ΦB are shown in Fig. 1(b). Contrary to the results of ΦB estimated using experimental JG–Eox data, our theoretical calculation clearly showsthat ΦB increases with increasing temperature due to thecombined effects of increasing


Temperature dependence of
Temperature (°C) | Eg (n+-polySi)(eV) | Eg (SiO2)(eV) | Φec(eV) |
25 | 1.004 | 8.900 | 3.334 |
100 | 1.015 | 8.883 | 3.339 |
200 | 0.980 | 8.859 | 3.348 |
300 | 0.944 | 8.847 | 3.359 |
The above discussions critically examine the limitations of the widely used LS Eq. (1) in identifying the thickness and temperature dependent conduction mechanism through thin SiO2 films used in MOS devices, even though a large class of JG versus Eox data can be empirically fitted with Eq. (1) yielding unphysical parameters. One should note that the above LS Eq. (1) originally derived[2] for electron emission from the metal electrode at 0 K is no longer valid for field emission from a semiconductor at room temperature and above[11] where a significant contribution in tunneling comes from the electrons residing below the CB edge due to band bending at the interface as schematically shown in Fig. 2(b). This physical idea necessitates redefining the electron barrier height by the CB offset
JFN=qmSikBT2π2ℏ3∫∞Ex=Ec,0dExTWKB(Ex)×ln[1+exp(EF−Ex)/kBT], |
(4) |
where
JFN=A′f(c)E2oxexp(−B′/Eox), |
(5) |
c=t(y)2kBT√2moxΦce/qℏEox, |
A′=A′FN/t2(y),B′=B′FNv(y), |
f(c)=e−ηc[2F1(1,−c;1−c;−eη)−cln(1+eη)−1], |
where
y=ΔΦce/Φce,ΔΦce=√q3Eox4πε∞ox. |
(6) |
ε2oxE2ox2qεsckBT=NcF3/2(η), |
(7) |
where εsc and Nc are the permittivity and density of states in the CB of the semiconductor, respectively and Fj is the complete Fermi-Dirac integral of fractional order j and is given by[14]
Fj(η)=1Γ(j+1)∫∞0xjdx1+exp(x−η), |
(8) |
where Γ(j) is the Gamma function[21].
Our modified formula for FN tunneling from the accumulation layer governed by Eq. (5) is valid for c < 1 depending on T and Eox as long as the cathode electric barrier remains triangular. In order to satisfy the condition c < 1, the lower limit of Eox increases from 4.14 to 6.4 MV/cm when the temperature changes from 100 to 300 °C. As expected, the new analytical expression for JFN is universal (independent of tox at a given temperature) for electron injection from the accumulation layer of a semiconductor having a given resistivity.
Using the CB offset values from independent band structure understanding as listed in Table 1 and employing Eq. (5), theoretically calculated JFN from n+-polySi is observed consistently much smaller than the measured[8] JG irrespective of temperatures and oxide thicknesses as illustrated in Fig. 3(a). Similar results are also presented in Fig. 3(b) during electron injection[3] at room temperature from non-degenerately doped n-type Si into SiO2 films having varying thicknesses (20 to 105 nm). This was found to be true also with the CB offset values calculated using its value[14] of 3.25 eV for nominal doping at room temperature (not shown here). Oxide thickness independent JFN shown in Fig. 3 exhibits a smaller thermal activation compared to that of the measured[3, 8] JG. The observed effect was distinct and reproducible in several different occasions as reported during the write operation[20] of EEPROM devices under positive gate bias as well as during electron injection[13] from n-4H-SiC into thin SiO2 and hence is not incidental.
The enhanced thermal activation of electron injection from the n+-polySi/SiO2 interface and oxide thickness dependency of the leakage current JG indicate the presence of a thermally activated trap-assisted mechanism via Poole-Frenkel (PF)[22, 23] or Schottky emission (SE)[14] or two-step generalized trap-assisted tunneling (GTAT)[1] in these thin SiO2 films. The GTAT model[1] is unlikely to be a candidate in explaining the strong temperature dependent JG data because the trap concentration in as-grown devices does not change with ambient temperature as reported experimentally by Hadjadj et al.[8]. Moreover, the difference between the magnitudes of JG and JFN does not fit (not shown) with the equation[14] of SE. On the other hand, it is evident from Fig. 4 that JG–JFN versus Eox data fit well with the bulk-limited PF emission equation given by[13, 22]
JPF=CPFEoxexp(−qΦT−ξβPF√EoxkBT), |
(9) |
βPF=√q3/πε0ε∞, |
where JPF(= JG–JFN) is the PF current density, JG is the measured leakage current density and JFN is theoretically calculated FN current density using Eq. (5) at an identical applied field. CPF is a constant depending on the density of electron traps and hence with tox as shown in Fig. 5(a), βPF is the PF constant, ε0 is the free space permittivity and ε∞ = 2.15 (square of refractive index) is the high-frequency dielectric constant of SiO2 and ΦT is the trap depth relative to the bottom of SiO2 CB. The acceptor compensation factor ξ varies between 1 and 2 depending upon the amount of acceptor compensation[22] as depicted in Fig. 5(b). ξ was found to increase linearly with increasing oxide thickness and temperature. Indeed, during oxidation, near-interfacial neutral electron traps are created in the oxide. These traps emit electrons into the oxide CB under the application of an electric field at room temperature and above via the PF mechanism[23]. ΦT can be determined from the Arrhenius plot of the intercepts of individual ln (JPF/Eox) versus
The classical PF Eq. (9) is physically meaningful till all the traps are ionized (emptied) and this happens at the saturation field Esat obtained from the solution[23] of
4. Conclusion
In conclusion, a comprehensive analysis is presented to understand the mechanisms of oxide thickness dependent electronic current conduction in thin SiO2 films at a wide range of temperatures under negative bias on the n+-polySi gate. We propose that the measured leakage current from the n+-polySi gate is due to PF emission of electrons from the process-induced near-interfacial electron traps located in the oxide gap at energy levels between 0.6 and 1.12 eV below the SiO2 CB for 5.4 to 12 nm-thick SiO2 films in conjunction with FN tunneling of electrons from the accumulation layer of n+-polySi. We address that fitting the measured JG versus Eox data with the widely used LS Eq. (1) incorrectly explains the conduction mechanism solely due to FN tunneling at room temperature and above, where the thermally activated PF emission of trapped electrons from the near-interfacial neutral electron traps is a dominant factor responsible for the increase in leakage current.
A new modified expression has been proposed to calculate the FN tunneling current density as a function of temperature and applied electric field during electron injection from the accumulation layer of the semiconductor. A method is developed to segregate the above two current components IFN and IPF from the measured leakage current IG, where IFN from the accumulated semiconductor substrate can be estimated using our modified FN equation without any adjustable parameters and taking the small variation of CB offset