J. Semicond. > 2018, Volume 39 > Issue 2 > 024004

SEMICONDUCTOR DEVICES

Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections

Bin Zhang1, , Xiaokuo Yang1, , Jiahao Liu1, Weiwei Li1, 2 and Jie Xu1

+ Author Affiliations

 Corresponding author: Bin Zhang, Email: kgdzhangbin@163.com; Xiaokuo Yang, yangxk0123@163.com

DOI: 10.1088/1674-4926/39/2/024004

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Abstract: Nanomagnet logic (NML) devices have been proposed as one of the best candidates for the next generation of integrated circuits thanks to its substantial advantages of nonvolatility, radiation hardening and potentially low power. In this article, errors of nanomagnetic interconnect wire subjected to magnet edge imperfections have been evaluated for the purpose of reliable logic propagation. The missing corner defects of nanomagnet in the wire are modeled with a triangle, and the interconnect fabricated with various magnetic materials is thoroughly investigated by micromagnetic simulations under different corner defect amplitudes and device spacings. The results show that as the defect amplitude increases, the success rate of logic propagation in the interconnect decreases. More results show that from the interconnect wire fabricated with materials, iron demonstrates the best defect tolerance ability among three representative and frequently used NML materials, also logic transmission errors can be mitigated by adjusting spacing between nanomagnets. These findings can provide key technical guides for designing reliable interconnects.

Key words: nanomagnet logic devicedefectinterconnectreliability



[1]
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[13]
Shah F A, Sankar V K, Li P, et al. Compensation of orange-peel coupling effect in magnetic tunnel junction free layer via shape engineering for nanomagnet logic applications. J Appl Phys, 2014, 115(17): 17B902 doi: 10.1063/1.4863935
[14]
Spedalieri F M, Jacob A P, Nikonov D E, et al. Performance of magnetic quantum cellular automata and limitations due to thermal noise. IEEE Trans Nanotechnol, 2011, 10(3): 537 doi: 10.1109/TNANO.2010.2050597
[15]
Alam M T, Kurtz S J, Siddiq M. On-chip clocking of nanomagnet logic lines and gates. IEEE Trans Nanotechnol, 2012, 11(2): 273 doi: 10.1109/TNANO.2011.2169983
[16]
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Fig. 1.  (Color online) The NML device and edge imperfection defect description. (a) Three dimension model of NML device. (b) The definition of NML logic state. (c) Edge imperfection defect modeling and four kinds of defects. (d) The scanning electron microscopy (SEM) image of defective nanomagnet.

Fig. 2.  (Color online) An on-chip NML circuit layout containing several interconnect wires.

Fig. 3.  The NML interconnect wire containing one defective nanomagnet. (a) The NLU or NRD-type defective nanomagnet interconnect wire. (b) The NRU or NLD-type defective nanomagnet interconnect wire.

Fig. 4.  (Color online) Simulation results of interconnect wire shown in Fig. 3. (a) Tolerable edge missing amplitude of different nanomagnet. (b) The initial magnetization with the application of Hclock. (c) The final magnetization after evolvement.

Fig. 5.  (Color online) Experimental results of defective interconnect wire shown in Fig. 3. (a) SEM image of interconnect wire subjected to edge imperfection. (b) The magnetic force microscopy (MFM) image of defective interconnect wire.

Fig. 6.  (Color online) Number of successes of each nanomagnet element versus the defect amplitude for different materials. (a) Permalloy material. (b) Co material. (c) Fe material.

Fig. 7.  (Color online) Nanomagnet spacing effects of defective interconnect wire fabricated with three different materials.

Table 1.   Three materials parameters and device sizes.

Parameter Permalloy Co Fe
MS (A/m) 8 × 105 10 × 105 17.5 × 105
A (J/m) 10.5 × 10−12 13 × 10−12 21 × 10−12
Size (nm3) 60 × 100 × 30 60 × 100 × 10 60 × 100 × 6
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[1]
Bernstein K, Cavin III R K, Porod W, et al. Device and architecture outlook for beyond CMOS switches. Proc IEEE, 2010, 98(12): 2169 doi: 10.1109/JPROC.2010.2066530
[2]
Tóth G, Lent C S. Quantum computing with quantum-dot cellular automata. Phys Rev A, 2001, 63(5): 052315 doi: 10.1103/PhysRevA.63.052315
[3]
Colci M, Johnson M. Dipolar coupling between nanopillar spin valves and magnetic quantum cellular automata arrays. IEEE Trans Nanotechnol, 2013, 12(5): 824 doi: 10.1109/TNANO.2013.2275033
[4]
Imre A, Csaba G, Ji L, et al. Majority logic gate for magnetic quantum-dot cellular automata. Science, 2006, 311(5758): 205 doi: 10.1126/science.1120506
[5]
Yang X K, Cai L, Zhang B, et al. Micromagnetic simulation of exploratory magnetic logic device with missing corner defect. J Magn Magn Mater, 2015(11): 391 doi: 10.1016/j.jmmm.2015.06.068
[6]
Allwood D A, Xiong G, Faulkner C C, et al. Magnetic domain-wall logic. Science, 2005, 309(5741): 1688 doi: 10.1126/science.1108813
[7]
Suh D I, Kil J P, Kim K W, et al. A single magnetic tunnel junction representing the basic logic functions-NAND, NOR, and IMP. IEEE Electron Device Letters, 2015, 36(4): 402 doi: 10.1109/LED.2015.2406881
[8]
Fong X, Kim Y, Yogendra K, et al. Spin-transfer torque devices for logic and memory: prospects and perspectives. IEEE Trans Comput-Aid Des Integr Circuits Syst, 2016, 35(1): 1 doi: 10.1109/TCAD.2015.2481793
[9]
Hu L, Hesjedal T. Micromagnetic investigation of the S-state reconfigurable logic element. IEEE Trans Magnet, 2012, 48(7): 2103 doi: 10.1109/TMAG.2012.2183607
[10]
Imtaar M A, Yadav A, Epping A, et al. Nanomagnet fabrication using nanoimprint lithography and electrodeposition. IEEE Trans Nanotechnol, 2013, 12(4): 547 doi: 10.1109/TNANO.2013.2257833
[11]
Yang X K, Cai L, Wang S Z, et al. Reliability and performance evaluation of QCA devices with rotation cell defect. IEEE Trans Nanotechnol, 2012, 11(9): 1009 doi: 10.1109/TNANO.2012.2211613
[12]
Niemier M, Varga E, Bernstein G H, et al. Shape engineering for controlled switching with nanomagnet logic. IEEE Trans Nanotechnol, 2012, 11(2): 220 doi: 10.1109/TNANO.2010.2056697
[13]
Shah F A, Sankar V K, Li P, et al. Compensation of orange-peel coupling effect in magnetic tunnel junction free layer via shape engineering for nanomagnet logic applications. J Appl Phys, 2014, 115(17): 17B902 doi: 10.1063/1.4863935
[14]
Spedalieri F M, Jacob A P, Nikonov D E, et al. Performance of magnetic quantum cellular automata and limitations due to thermal noise. IEEE Trans Nanotechnol, 2011, 10(3): 537 doi: 10.1109/TNANO.2010.2050597
[15]
Alam M T, Kurtz S J, Siddiq M. On-chip clocking of nanomagnet logic lines and gates. IEEE Trans Nanotechnol, 2012, 11(2): 273 doi: 10.1109/TNANO.2011.2169983
[16]
Chunsheng E, Rantschler J, Khizroev S, et al. Micromagnetics of signal propagation in magnetic cellular logic data channels. J Appl Phys, 2008, 104(5): 054311 doi: 10.1063/1.2975836
[17]
Donahue M J, Porter D G. OOMMF user's guide. Version 1.0. Interagency Report NISTIR 6376, National Institute of Standards and Technology (NIST), Gaithersburg, MD
[18]
Yang X K, Cai L, Wang J H, et al. Experimental study of magnetic quantum-dot cellular automata function arrays. Acta Phys Sin, 2012, 61(4): 047502
[19]
Kumari A, Bhanja S. Landauer clocking for magnetic cellular automata (MCA) arrays. IEEE Trans Very Large Scale Integr Syst, 2011, 19(4): 714 doi: 10.1109/TVLSI.2009.2036627
[20]
D’Souza N, Fashami M S, Bandyopadhyay S, et al. Experimental clocking of nanomagnets with strain for ultralow power boolean logic. Nano Lett, 2016, 16(2): 1069 doi: 10.1021/acs.nanolett.5b04205
[21]
Gross L, Schlittler R R, Meyer G, et al. Magnetologic devices fabricated by nanostencil lithography. Nanotechnology, 2010, 21(32): 325301 doi: 10.1088/0957-4484/21/32/325301
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    Received: 22 June 2017 Revised: 24 July 2017 Online: Uncorrected proof: 24 January 2018Accepted Manuscript: 02 February 2018Published: 02 February 2018

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      Bin Zhang, Xiaokuo Yang, Jiahao Liu, Weiwei Li, Jie Xu. Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections[J]. Journal of Semiconductors, 2018, 39(2): 024004. doi: 10.1088/1674-4926/39/2/024004 ****B Zhang, X K Yang, J H Liu, W W Li, J Xu. Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections[J]. J. Semicond., 2018, 39(2): 024004. doi: 10.1088/1674-4926/39/2/024004.
      Citation:
      Bin Zhang, Xiaokuo Yang, Jiahao Liu, Weiwei Li, Jie Xu. Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections[J]. Journal of Semiconductors, 2018, 39(2): 024004. doi: 10.1088/1674-4926/39/2/024004 ****
      B Zhang, X K Yang, J H Liu, W W Li, J Xu. Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections[J]. J. Semicond., 2018, 39(2): 024004. doi: 10.1088/1674-4926/39/2/024004.

      Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections

      DOI: 10.1088/1674-4926/39/2/024004
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      Project supported by the National Natural Science Foundation of China (No. 61302022) and the Scientific Research Foundation for Postdoctor of Air Force Engineering University (Nos. 2015BSKYQD03, 2016KYMZ06).

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