J. Semicond. > 2019, Volume 40 > Issue 4 > 042801
|

ARTICLES

Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors

Shuxin Tan1, and Takashi Egawa2

+ Author Affiliations

 Corresponding author: Shuxin Tan, email: tansx2014@ntu.edu.cn

DOI: 10.1088/1674-4926/40/4/042801

PDF

Turn off MathJax

Abstract: AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) on a silicon substrate were fabricated with silicon oxide as a gate dielectric by sputtering deposition and electron-beam (EB) evaporation. It was found that the oxide deposition method and conditions have great influences on the electrical properties of HEMTs. The low sputtering temperature or oxygen introduction at higher temperature results in a positive equivalent charge density at the oxide/AlGaN interface (Nequ), which induces a negative shift of threshold voltage and an increase in both sheet electron density (ns) and drain current density (ID). Contrarily, EB deposition makes a negative Nequ, resulting in reduced ns and ID. Besides, the maximum transconductance (gm-max) decreases and the off-state gate current density (IG-off) increases for oxides at lower sputtering temperature compared with that at higher temperature, possibly due to a more serious sputter-induced damage and much larger Nequ at lower sputtering temperature. At high sputtering temperature, IG-off decreases by two orders of magnitude compared to that without oxygen, which indicates that oxygen introduction and partial pressure depression of argon decreases the sputter-induced damage significantly. IG-off for EB-evaporated samples is lower by orders of magnitude than that of sputtered ones, possibly attributed to the lower damage of EB evaporation to the barrier layer surface.

Key words: AlGaN/GaN MIS-HEMTs, sputtering deposition, electron-beam evaporation, silicon oxide, electrical properties

GaN and AlN alloys are good choices for the fabrication of optoelectronics and electronic devices, such as light-emitting diodes, ultraviolet detectors, and high-power and high-frequency electronic devices, due to their excellent material properties[1–9]. These applications lead to a huge market, which provides a strong impetus for research. By using superior material features, such as a large bandgap, high breakdown field, high electron mobility and large two-dimensional electron gas (2DEG) density, the AlGaN/GaN based high-electron-mobility transistor (HEMT) has been identified to be the most promising candidate for high-power and high-frequency applications. However, the facilitation of sufficient positive gate voltage swings and suppression of leakage current for the HEMTs are tasks still to be solved. Metal–insulator–semiconductor (MIS) structure is an attractive alternative to the conventional Schottky gate contact to solve the problems. Although numerous insulators, such as SiO2, Al2O3, HfO2, MgO, Ta2O5, Sc2O3, ZrO2, AlN and Si3N4 have been studied as the gate dielectric for GaN-based HEMTs[10–24], silicon oxide remains popular due to its large band gap (~9 eV), large conduction band discontinuity (~3 eV) and high critical breakdown electric field (~ 15 MV/cm) in comparison with other gate insulators typically used[23, 24]. In addition, it is already consolidated in the Si-devices industry, and it is also applied to depress the dark current of GaN-based ultraviolet detectors[25]. A different quality of insulator and interface state of insulator/semiconductor could be obtained by different deposition techniques and deposition conditions, which strongly impact the electrical performance of the devices[22, 26]. Sputtering deposition and electron beam (EB) evaporation are nowadays well established as two important techniques for the preparation of thin silicon oxide films. Their advantages include lower deposition temperature and equipment cost, and secure working atmosphere without using the toxic metal–organic precursors and ammonia[27]. In addition, sputtering deposition can form thin films with good uniformity and good adhesion to the substrate surface without involving the complications of the target heating process[28]. In this work, we fabricated the MIS-HEMTs using sputtered and electron-beam evaporated silicon oxide as gate dielectric, and investigated the performance of devices under different deposition techniques and sputtering conditions.

The HEMT structure consisted of unintentionally doped-Al0.26Ga0.74N (25 nm)/unintentionally doped-GaN (1 μm)/super lattices (GaN/AlGaN)/buffer layer (AlGaN/AlN) grown by metal organic chemical vapor deposition (MOCVD) on a 4-inch silicon substrate. The fabrication of HEMTs and two-terminal circular diodes for capacitance–voltage (C–V) measurement started with device isolation by BCl3 plasma reactive ion etching. Then silicon oxide was deposited by different deposition techniques and deposition conditions. After etching the silicon oxide with buffered HF solution, the ohmic contact was formed using Ti/Al/Ni/Au (15/72/12/40 nm) followed by rapid thermal annealing at 850 °C for 30 s in a N2 atmosphere. The Ni/Ti/Au (40/20/60 nm) was deposited on silicon oxide as a gate electrode. Several samples have been fabricated in terms of oxide deposition. Oxides for samples A and B were deposited with similar thickness by RF sputter at room temperature (RT) and 150 °C, respectively, under Ar atmosphere. Oxides for samples C and D were deposited by RF sputter at 150 °C under Ar and Ar/O2 atmosphere (Ar : O2 = 1 : 1), respectively. The difference of sample B and sample C was the oxide thickness. Oxide for sample E was deposited by electron-beam evaporation at 150 °C under oxygen atmosphere. Oxides for samples C, D and E have a similar thickness. The target for sputter is silicon oxide. The gate length and width for HEMT devices is 1.5 and 15 μm, respectively. In order to calculate the carrier density and oxide thickness, Schottky diodes without silicon oxide for capacitance–voltage (C–V) measurement were also fabricated. The current–voltage (I–V) characteristics were measured on an Agilent 4156c semiconductor parameter analyzer. Capacitance–voltage (C–V) measurement was carried out using an HP4845 LCR meter.

C–V characteristics for all the diodes at 1 MHz are shown in Fig. 1. The thicknesses of silicon oxide films for samples A to E were estimated to be around 11, 10, 3.8, 4.0 and 4.0 nm, respectively, based on the formula,

Figure  1.  (Color online) C–V characteristics at 1 MHz for all the diodes.
DownLoad: Full-Size Img PowerPoint

dins=εinsεo(1/CMIS−1/CAlGaN),

(1)

where dins is the thickness of silicon oxide, εins is the relative dielectric permittivity of silicon oxide taken as 3.9, εo is the dielectric permittivity of a vacuum, and CMIS and CAlGaN are the unit-area capacitances of the MIS-diodes and the Schottky diode at 0 V, respectively. From C–V curves, the sheet carrier density (ns) could be estimated according to the expression,

ns=∫0VthCdV,

(2)

where Vth is defined as the gate voltage at which the GaN buffer is depleted in the C–V curve. The ns were calculated to be 1.2 × 1013, 6.4 × 1012, 6.3 × 1012, 7.0 × 1012, 3.6 × 1012 and 5.1 × 1012 cm−2 for samples A to E and Schottky diode, respectively. Considering the very low electron concentration in the GaN buffer compared with the electron density of 2DEG in channel and neglecting the interface states due to high-frequency (HF) capacitance, ns could be regarded as the electron density of 2DEG. It should be noticed that ns in sample A was more than twice of that in the Schottky diode, while sample E reduced 30% compared with the Schottky diode. According to Poisson’s equation and the Schrödinger equation, ns for 2DEG can be expressed as

nSchottkys=σpq−CAlGaN(ϕb−ΔEcq+ΔESchottkyFq−VG)q,

(3)

for Schottky HEMTs, and

nMISs=σpq−CMISϕ′b−ΔEinscq−ΔEcq+ΔEMISFq−VGq+CMISqNequCins,

(4)

for MIS-diode, where ϕb and ϕ′b are the barrier height for Ni/Al0.26Ga0.74N and Ni/SiO2, taken as 0.9 V (obtained from the current-voltage curve of the Schottky diode) and 3.6 V[29], respectively. ΔEinsc and ΔEC are conduction band discontinuity taken as 3.1 and 0.3 eV for SiO2/Al0.26GaN and Al0.26GaN/GaN, respectively. CMIS, Cins and CAlGaN are capacitance per unit of MIS-diode, oxide and Schottky diode, respectively. σp is the total polarization sheet charge density. VG is applied to gate bias. qNequ is defined as the equivalent charge density at the oxide/AlGaN interface, which includes the oxide/barrier interface trap (Nit) and interfical fixed charge at the oxide/AlGaN interface (Qif) (including the polarization charge at the surface AlGaN barrier, the ionized donor density at AlGaN barrier surface and the fixed charge density of the silicon oxide at the oxide/barrier interface), as well as the equivalent charge density at the AlGaN/GaN interface generated by the charge density in oxide bulk (Qbulk). ΔESchottkyF and ΔEMISF is the Fermi level with respect to the GaN conduction-band-edge energy at the AlGaN/GaN interface for Schottky HEMT and MIS-HEMT, respectively, and ΔEF is expressed as[30]

ΔEF=E1+πℏ2m∗ns,

(5)

E1=(9πℏq28√8m∗ε0εns)2/3,

(6)

where m* is the electron effective mass of GaN and taken as 0.22m0 (m0 is the free electron mass). Therefore,

nMISs=nSchottkys+CAlGaN(ϕb−ΔEcq+ΔESchottkyFq−VG)q−CMISϕ′b−ΔEinscq−ΔEcq+ΔEMISFq−VGq+CMISqNequCins.

(7)

Considering nSchottkys of 5.1 × 1012 cm−2, nMISs at gate bias 0 V could be estimated as 6.5 × 1012 cm−2 for samples A and B and 6.2 × 1012 cm−2 for samples C to E, assuming Nequ is zero in MIS-diodes. Compared with the calculated value without Nequ, ns obtained from C–V curves for sample A almost doubled and for sample D rised slightly, while for sample E it decreased to nearly half. This indicated that Nequ for sample A and D was positive, which increased the ns. Nequ for EB-oxide (sample E) was negative, which reduced ns. For samples B and C, the experimental value was very close to the calculated one, indicating that Nequ could be negligible. According to Eq. (7), Nequ could be estimated as 1.0 × 1013 and 2.8 × 1012 cm−2 for samples A and D, respectively, with positive charge and 8.8 × 1012 cm−2 for sample E with negative charge. That is, for sputtered samples, lower temperature or high temperature with oxygen introduction will resulte in positive Nequ. If Nit could be negeligible due to hf capacitance, Qif and/or Qbulk should be the main contribution to Nequ. Hence, the contribution of Qif and Qbulk could be ignored for the case of samples B and C due to negligible Nequ estimated above. Threshold voltage (Vth) could also be extracted for samples A to E and the Schottky diode from C–V measurements as −14.5, −7.8, −4.5, −4.9, −3.0 and −2.8 V, respectively, defined as the gate voltage at which the GaN buffer is depleted. Obviously, due to its larger positive charged Nequ, sample A showed a negative shift of Vth compared with sample B though their oxide thicknesses were similar. For the samples with similar oxide thickness, samples D and E showed negative and positive shift of Vth relative to sample C, due to the positive and negative charged Nequ in comparison with sample C, respectively.

Fig. 2 shows the drain current–drain voltage (ID–VD) curves and transfer characteristics for all the HEMTs. From Figs. 2(a) and 2(b), the drain current density for sample A was larger than that of sample B at the same gate voltage, which was due to larger ns for sample A. The maximum current density (ID-max) for samples A and B were 1323 and 1008 mA/mm, respectively, at the maximum applied gate voltage of 5.5 V. The maximum transconductance (gm-max) for sample A and B were 77 and 90 mS/mm, respectively. The lower gm-max of sample A indicated that the mobility is lower compared with that of sample B, which is possibly because of electron scattering enhancement for sample A due to the highest electron density (exceeded 1013 cm−2 in 2DEG), the remote coulombic scattering enhancement by much more positive interfacial charge and higher sputtered-induced damage in the sputtering process for sample A[31]. The output characteristics and transfer characteristics for samples C, D and E were shown in Figs. 2(c) and 2(d). The ID for sample C was smaller than that of sample D, but larger than that of sample E at the same gate voltage, which was due to the Nequ-induced similar change trends of ns. For example, the ID-max for samples D, C and E were 1027, 933 and 812 mA/mm at the applied gate voltage of 3.5 V, respectively. The gm-max for samples C, D and E were 132, 147 and 160 mS/mm, respectively. The highest gm-max of sample E indicated that the mobility is highest among the three samples, which is possibly because, for sample E, the low electron density and no sputtering-induced surface damage[32] suppress the electron scattering.

Figure  2.  (Color online) (a) The output characteristics and (b) the transfer characteristics for samples A and B. (c) The output characteristics and (d) the transfer characteristics for samples C, D and E.
DownLoad: Full-Size Img PowerPoint

Figs. 3(a) and 3(b) showed the drain current–gate voltage (ID–VG) curves and three-terminal gate current density on a semi-logarithmic scale. It can be seen that the off-state gate current density (IG-off) is larger than the off-state drain current density (ID-off), which indicates ID-off is a branch of IG-off for all HEMT devices within the gate voltage sweeping range. Considering the difference of IG-off between the devices is several orders of magnitude and much larger than the difference of ID-max, the ID-on/ID-off ratio mainly depends on IG-off. We compared the IG-off value taken at the turn-around point in a logarithmic ID–VG curve. IG-off on the order of 10 mA/mm for sample A is more than one order of magnitude larger than that of sample B (10−1 mA/mm), which is possibly due to the higher sputter-induced shallow donor-like N vacancies[32–34] and much more Nequ for oxide deposited at lower substrate temperature. IG-off for sample C is in the order of 10−2 mA/mm, which is also one order of magnitude larger than that for sample D (10−3 mA/mm). This inferred that the reduced Ar partial pressure and oxygen introduction could lead to lower sputter-induced N vacancies, which may be ascribed to the energy bombarded on the surface of the barrier layer being reduced because of the smaller atomic mass of O than Ar. In all the samples with sputtered oxides, the IG-off is orders of magnitude larger than that of sample E with EB-evaporated oxide (10−4 mA/mm), which suggested that the surface damage of the barrier layer by EB deposition was low and the carrier tunneling was suppressed by oxide.

Figure  3.  (Color online) The ID–VG curves and three-terminal gate current density (IG) in semi-logarithmic scale for (a) samples A and B and (b) samples C, D and E.
DownLoad: Full-Size Img PowerPoint

In this paper, AlGaN/GaN based MIS-HEMTs were fabricated using EB-evaporated and sputtered silicon oxide as dielectric. It was found that the electrical properties were influenced by oxide deposition techniques and deposit condition. The high ns and high drain current density as well as high gate leakage could be achieved using silicon oxide as the gate dielectric by RF-sputtering deposition at room temperature, while low ns, positive shift of Vth and low gate leakage could be obtained using EB-evaporated oxide as the gate dielectric. That is, there is a tradeoff among the deposition methods and deposition conditions for the HEMT devices to achieve appropriate electrical properities.

This work was partly supported by the National Science Foundation of China (No. 61504071).



[1]
Acharyya A. Hot electron transport in wurtzite-GaN: effects of temperature and doping concentration. J Semicond, 2018, 39(7), 072002 doi: 10.1088/1674-4926/39/7/072002
[2]
Liang F, Zhao D G, Jiang D S, et al. Performance enhancement of the GaN-based laser diode by using an unintentionally doped GaN upper waveguide. Jpn J Appl Phys, 2018, 57, 070307 doi: 10.7567/JJAP.57.070307
[3]
Huang X, Du C, Zhou Y, et al. Piezo-phototronic effect in a quantum well structure. ACS Nano, 2016, 10, 5145 doi: 10.1021/acsnano.6b00417
[4]
Li X, Ma P, Ji X, et al. Implementation of slow and smooth etching of GaN by inductively coupled plasma. J Semicond, 2018, 39(11), 113002 doi: 10.1088/1674-4926/39/11/113002
[5]
Tzou A, Chu K H, Lin I F, et al. AlN surface passivation of GaN-based high electron mobility transistors by plasma-enhanced atomic layer deposition. Nanoscale Res Lett, 2017, 12, 315 doi: 10.1186/s11671-017-2082-0
[6]
Li D, Sun X, Song H, et al. Realization of a high-performance GaN UV detector by nanoplasmonic enhancement. Adv Mater, 2012, 24, 845 doi: 10.1002/adma.201102585
[7]
Zhao D G, Zhu J J, Liu Z S, et al. Surface morphology of AlN buffer layer and its effect on the GaN growth by metalorganic vapor chemical deposition. Appl Phys Lett, 2004, 85, 1499 doi: 10.1063/1.1784034
[8]
Tan S, Deng X, Zhang B, et al. Thermal stability of F ion-implant isolated AlGaN/GaN heterostructures. Sci China-Phys Mech Astron, 2018, 61, 127311 doi: 10.1007/s11433-018-9312-7
[9]
Zhao S X, Liu X Y, Zhang L Q, et al. Impacts of thermal atomic layer-deposited AlN passivation layer on GaN-on-Si high electron mobility transistors. Nanoscale Res Lett, 2016, 11, 137 doi: 10.1186/s11671-016-1335-7
[10]
Meneghesso G, Meneghini M, Bisi D, et al. Trapping and reliability issues in GaN-based MIS HEMTs with partially recessed gate. Microelectron Reliab, 2016, 58, 151 doi: 10.1016/j.microrel.2015.11.024
[11]
Lagger P, Steinschifter P, Reiner M, et al. Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator semiconductor structures under forward gate bias stress. Appl Phys Lett, 2014, 105, 033512 doi: 10.1063/1.4891532
[12]
Sugiura S, Kishimoto S, Mizutani T, et al. Normally-off AlGaN/GaN MOSFETs with HfO2 gate oxide. Phys Stat Sol C, 2008, 5, 1923 doi: 10.1002/pssc.200778449
[13]
Hashizume T, Anantathanasarn S, Negoro N, et al. Al2O3 insulated-gate structure for AlGaN/GaN heterostructure field effect transistors having thin AlGaN barrier layers. Jpn J Appl Phys, 2004, 43, L777 doi: 10.1143/JJAP.43.L777
[14]
Van Hove M, Kang X, Stoffels S, et al. Fabrication and performance of Au-free AlGaN/GaN-on-silicon power devices with Al2O3 and Si3N4/Al2O3 gate dielectrics. IEEE Trans Electron Devices, 2013, 60, 3071 doi: 10.1109/TED.2013.2274730
[15]
Liu T, Jiang C, Huang X, et al. Electrical transportation and piezotronic-effect modulation in AlGaN/GaN MOS HEMTs and unpassivated HEMTs. Nano Energy, 2017, 39, 53 doi: 10.1016/j.nanoen.2017.06.041
[16]
Shih H Y, Chu F C, Lee C Y, et al. Atomic layer deposition of gallium oxide films as gate dielectrics in AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors. Nanoscale Res Lett, 2016, 11, 235 doi: 10.1186/s11671-016-1448-z
[17]
Derluyn J, Boeykens S, Cheng K, et al. Improvement of AlGaN GaN high electron mobility transistor structures by in situ deposition of a Si3N4 surface layer. J Appl Phys, 2005, 98, 054501 doi: 10.1063/1.2008388
[18]
Ao J P, Nakatani K, Ohmuro K, et al. GaN metal–oxide–semiconductor field-effect transistor with tetraethylorthosilicate SiO2 gate insulator on AlGaN/GaN heterostructure. Jpn J Appl Phys, 2010, 49, 04DF09 doi: 10.1143/JJAP.48.04C095
[19]
Asif Khan M, Hu X, Tarakji A, et al. AlGaN/GaN metal–oxide–semiconductor heterostructure field-effect transistors on SiC substrates. Appl Phys Lett, 2000, 77, 1339 doi: 10.1063/1.1290269
[20]
Liu C, Chor E F, Tan L S. Investigations of HfO2/AlGaN/GaN metal–oxide–semiconductor high electron mobility transistors. Appl Phys Lett, 2006, 88, 173504 doi: 10.1063/1.2198507
[21]
Tan S, Selvaraj S L, Egawa T. Metal–organic chemical vapor deposition of quasi-normally-off AlGaN/GaN filed-effect transistors on silicon substrates using low-temperature gown AlN cap layers. Appl Phys Lett, 2010, 97, 053502 doi: 10.1063/1.3475394
[22]
Ronchi N, De Jaeger B, Van Hove M, et al. Combined plasma-enhanced-atomic-layer-deposition gate dielectric and in situ SiN cap layer for reduced threshold voltage shift and dynamic ON-resistance dispersion of AlGaN/GaN high electron mobility transistors on 200 mm Si substrates. Jpn J Appl Phys, 2015, 54, 04DF02 doi: 10.7567/JJAP.54.04DF02
[23]
Lee J G, Kim H S, Seo K S, et al. High quality PECVD SiO2 process for recessed MOS-gate of AlGaN/GaN-on-Si metal–oxide–semiconductor heterostructure field-effect transistors. Solid State Electron, 2015, 122, 32 doi: 10.1016/j.sse.2016.04.016
[24]
Fiorenza P, Greco G, Iucolano F, et al. Slow and fast traps in metal–oxide–semiconductor capacitors fabricated on recessed AlGaN/GaN heterostructures. Appl Phys Lett, 2015, 106, 142903 doi: 10.1063/1.4917250
[25]
Sun X, Li D, Jiang H, et al. Improved performance of GaN metal–semiconductor–metal ultraviolet detectors by depositing SiO2 nanoparticles on a GaN surface. Appl Phys Lett, 2011, 98, 121117 doi: 10.1063/1.3567943
[26]
Dutta G, Das Gupta N, Das Gupta A. Effect of sputtered-Al2O3 layer thickness on the threshold voltage of III-nitride MIS-HEMTs. IEEE Trans Electron Devices, 2016, 63, 1450 doi: 10.1109/TED.2016.2529428
[27]
Tuan T, Kuo D H. Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes. Mater Sci Semicon Proc, 2015, 30, 314 doi: 10.1016/j.mssp.2014.10.021
[28]
Xirouchaki C, Palmer R E. Deposition of size-selected metal clusters generated by magnetron sputtering and gas condensation: a progress review. Phil Trans R Soc Lond A, 2004, 362, 117 doi: 10.1098/rsta.2003.1306
[29]
Maeda N, Hiroki M, Watanabe N, et al. Systematic study of insulator deposition effect (Si3N4, SiO2, AlN, and Al2O3) on electrical properties in AlGaN/GaN heterostructures. Jpn J Appl Phys, 2007, 46, 547 doi: 10.1143/JJAP.46.547
[30]
Ambacher O, Majewski J, Miskys C, et al. Pyroelectric properties of Al(In)GaN/GaN hetero- and quantum well structures. J Phys: Condens Matter, 2002, 14, 3399 doi: 10.1088/0953-8984/14/13/302
[31]
Zhu J J, Ma X H, Xie Y, et al. Improved interface and transport properties of AlGaN/GaN MIS-HEMTs with PEALD-grown AlN gate dielectric. IEEE Trans Electron Devices, 2015, 62, 512 doi: 10.1109/TED.2014.2377781
[32]
Seok O, Ahn W, Han M K, et al. Effect of Ga2O3 sputtering power on breakdown voltage of AlGaN/GaN high-electron-mobility transistors. J Vac Sci Tech B, 2013, 31, 011203 doi: 10.1116/1.4769863
[33]
Chang S J, Lan C H, Hwang J D, et al. Sputtered indium-tin-oxide on p-GaN. J Electrochem Soc, 2008, 155, H140 doi: 10.1149/1.2820626
[34]
Stoklas R, Gregušová D, Gaži Š, et al. Performance of AlGaN/GaN metal–insulator–semiconductor heterostructure field-effect transistors with AlN gate insulator prepared by reactive magnetron sputtering. J Vac Sci Tech B, 2011, 29, 01A809 doi: 10.1116/1.3523362
Fig. 1.  (Color online) C–V characteristics at 1 MHz for all the diodes.

DownLoad: Full-Size Img PowerPoint
Fig. 2.  (Color online) (a) The output characteristics and (b) the transfer characteristics for samples A and B. (c) The output characteristics and (d) the transfer characteristics for samples C, D and E.

DownLoad: Full-Size Img PowerPoint
Fig. 3.  (Color online) The ID–VG curves and three-terminal gate current density (IG) in semi-logarithmic scale for (a) samples A and B and (b) samples C, D and E.

DownLoad: Full-Size Img PowerPoint
[1]
Acharyya A. Hot electron transport in wurtzite-GaN: effects of temperature and doping concentration. J Semicond, 2018, 39(7), 072002 doi: 10.1088/1674-4926/39/7/072002
[2]
Liang F, Zhao D G, Jiang D S, et al. Performance enhancement of the GaN-based laser diode by using an unintentionally doped GaN upper waveguide. Jpn J Appl Phys, 2018, 57, 070307 doi: 10.7567/JJAP.57.070307
[3]
Huang X, Du C, Zhou Y, et al. Piezo-phototronic effect in a quantum well structure. ACS Nano, 2016, 10, 5145 doi: 10.1021/acsnano.6b00417
[4]
Li X, Ma P, Ji X, et al. Implementation of slow and smooth etching of GaN by inductively coupled plasma. J Semicond, 2018, 39(11), 113002 doi: 10.1088/1674-4926/39/11/113002
[5]
Tzou A, Chu K H, Lin I F, et al. AlN surface passivation of GaN-based high electron mobility transistors by plasma-enhanced atomic layer deposition. Nanoscale Res Lett, 2017, 12, 315 doi: 10.1186/s11671-017-2082-0
[6]
Li D, Sun X, Song H, et al. Realization of a high-performance GaN UV detector by nanoplasmonic enhancement. Adv Mater, 2012, 24, 845 doi: 10.1002/adma.201102585
[7]
Zhao D G, Zhu J J, Liu Z S, et al. Surface morphology of AlN buffer layer and its effect on the GaN growth by metalorganic vapor chemical deposition. Appl Phys Lett, 2004, 85, 1499 doi: 10.1063/1.1784034
[8]
Tan S, Deng X, Zhang B, et al. Thermal stability of F ion-implant isolated AlGaN/GaN heterostructures. Sci China-Phys Mech Astron, 2018, 61, 127311 doi: 10.1007/s11433-018-9312-7
[9]
Zhao S X, Liu X Y, Zhang L Q, et al. Impacts of thermal atomic layer-deposited AlN passivation layer on GaN-on-Si high electron mobility transistors. Nanoscale Res Lett, 2016, 11, 137 doi: 10.1186/s11671-016-1335-7
[10]
Meneghesso G, Meneghini M, Bisi D, et al. Trapping and reliability issues in GaN-based MIS HEMTs with partially recessed gate. Microelectron Reliab, 2016, 58, 151 doi: 10.1016/j.microrel.2015.11.024
[11]
Lagger P, Steinschifter P, Reiner M, et al. Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator semiconductor structures under forward gate bias stress. Appl Phys Lett, 2014, 105, 033512 doi: 10.1063/1.4891532
[12]
Sugiura S, Kishimoto S, Mizutani T, et al. Normally-off AlGaN/GaN MOSFETs with HfO2 gate oxide. Phys Stat Sol C, 2008, 5, 1923 doi: 10.1002/pssc.200778449
[13]
Hashizume T, Anantathanasarn S, Negoro N, et al. Al2O3 insulated-gate structure for AlGaN/GaN heterostructure field effect transistors having thin AlGaN barrier layers. Jpn J Appl Phys, 2004, 43, L777 doi: 10.1143/JJAP.43.L777
[14]
Van Hove M, Kang X, Stoffels S, et al. Fabrication and performance of Au-free AlGaN/GaN-on-silicon power devices with Al2O3 and Si3N4/Al2O3 gate dielectrics. IEEE Trans Electron Devices, 2013, 60, 3071 doi: 10.1109/TED.2013.2274730
[15]
Liu T, Jiang C, Huang X, et al. Electrical transportation and piezotronic-effect modulation in AlGaN/GaN MOS HEMTs and unpassivated HEMTs. Nano Energy, 2017, 39, 53 doi: 10.1016/j.nanoen.2017.06.041
[16]
Shih H Y, Chu F C, Lee C Y, et al. Atomic layer deposition of gallium oxide films as gate dielectrics in AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors. Nanoscale Res Lett, 2016, 11, 235 doi: 10.1186/s11671-016-1448-z
[17]
Derluyn J, Boeykens S, Cheng K, et al. Improvement of AlGaN GaN high electron mobility transistor structures by in situ deposition of a Si3N4 surface layer. J Appl Phys, 2005, 98, 054501 doi: 10.1063/1.2008388
[18]
Ao J P, Nakatani K, Ohmuro K, et al. GaN metal–oxide–semiconductor field-effect transistor with tetraethylorthosilicate SiO2 gate insulator on AlGaN/GaN heterostructure. Jpn J Appl Phys, 2010, 49, 04DF09 doi: 10.1143/JJAP.48.04C095
[19]
Asif Khan M, Hu X, Tarakji A, et al. AlGaN/GaN metal–oxide–semiconductor heterostructure field-effect transistors on SiC substrates. Appl Phys Lett, 2000, 77, 1339 doi: 10.1063/1.1290269
[20]
Liu C, Chor E F, Tan L S. Investigations of HfO2/AlGaN/GaN metal–oxide–semiconductor high electron mobility transistors. Appl Phys Lett, 2006, 88, 173504 doi: 10.1063/1.2198507
[21]
Tan S, Selvaraj S L, Egawa T. Metal–organic chemical vapor deposition of quasi-normally-off AlGaN/GaN filed-effect transistors on silicon substrates using low-temperature gown AlN cap layers. Appl Phys Lett, 2010, 97, 053502 doi: 10.1063/1.3475394
[22]
Ronchi N, De Jaeger B, Van Hove M, et al. Combined plasma-enhanced-atomic-layer-deposition gate dielectric and in situ SiN cap layer for reduced threshold voltage shift and dynamic ON-resistance dispersion of AlGaN/GaN high electron mobility transistors on 200 mm Si substrates. Jpn J Appl Phys, 2015, 54, 04DF02 doi: 10.7567/JJAP.54.04DF02
[23]
Lee J G, Kim H S, Seo K S, et al. High quality PECVD SiO2 process for recessed MOS-gate of AlGaN/GaN-on-Si metal–oxide–semiconductor heterostructure field-effect transistors. Solid State Electron, 2015, 122, 32 doi: 10.1016/j.sse.2016.04.016
[24]
Fiorenza P, Greco G, Iucolano F, et al. Slow and fast traps in metal–oxide–semiconductor capacitors fabricated on recessed AlGaN/GaN heterostructures. Appl Phys Lett, 2015, 106, 142903 doi: 10.1063/1.4917250
[25]
Sun X, Li D, Jiang H, et al. Improved performance of GaN metal–semiconductor–metal ultraviolet detectors by depositing SiO2 nanoparticles on a GaN surface. Appl Phys Lett, 2011, 98, 121117 doi: 10.1063/1.3567943
[26]
Dutta G, Das Gupta N, Das Gupta A. Effect of sputtered-Al2O3 layer thickness on the threshold voltage of III-nitride MIS-HEMTs. IEEE Trans Electron Devices, 2016, 63, 1450 doi: 10.1109/TED.2016.2529428
[27]
Tuan T, Kuo D H. Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes. Mater Sci Semicon Proc, 2015, 30, 314 doi: 10.1016/j.mssp.2014.10.021
[28]
Xirouchaki C, Palmer R E. Deposition of size-selected metal clusters generated by magnetron sputtering and gas condensation: a progress review. Phil Trans R Soc Lond A, 2004, 362, 117 doi: 10.1098/rsta.2003.1306
[29]
Maeda N, Hiroki M, Watanabe N, et al. Systematic study of insulator deposition effect (Si3N4, SiO2, AlN, and Al2O3) on electrical properties in AlGaN/GaN heterostructures. Jpn J Appl Phys, 2007, 46, 547 doi: 10.1143/JJAP.46.547
[30]
Ambacher O, Majewski J, Miskys C, et al. Pyroelectric properties of Al(In)GaN/GaN hetero- and quantum well structures. J Phys: Condens Matter, 2002, 14, 3399 doi: 10.1088/0953-8984/14/13/302
[31]
Zhu J J, Ma X H, Xie Y, et al. Improved interface and transport properties of AlGaN/GaN MIS-HEMTs with PEALD-grown AlN gate dielectric. IEEE Trans Electron Devices, 2015, 62, 512 doi: 10.1109/TED.2014.2377781
[32]
Seok O, Ahn W, Han M K, et al. Effect of Ga2O3 sputtering power on breakdown voltage of AlGaN/GaN high-electron-mobility transistors. J Vac Sci Tech B, 2013, 31, 011203 doi: 10.1116/1.4769863
[33]
Chang S J, Lan C H, Hwang J D, et al. Sputtered indium-tin-oxide on p-GaN. J Electrochem Soc, 2008, 155, H140 doi: 10.1149/1.2820626
[34]
Stoklas R, Gregušová D, Gaži Š, et al. Performance of AlGaN/GaN metal–insulator–semiconductor heterostructure field-effect transistors with AlN gate insulator prepared by reactive magnetron sputtering. J Vac Sci Tech B, 2011, 29, 01A809 doi: 10.1116/1.3523362
1

Analysis of morphological, structural and electrical properties of annealed TiO2 nanowires deposited by GLAD technique

B. Shougaijam, R. Swain, C. Ngangbam, T.R. Lenka

Journal of Semiconductors, 2017, 38(5): 053001. doi: 10.1088/1674-4926/38/5/053001
2

Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures

G. Nagaraju, K. Ravindranatha Reddy, V. Rajagopal Reddy

Journal of Semiconductors, 2017, 38(11): 114001. doi: 10.1088/1674-4926/38/11/114001
3

Progress in complementary metal-oxide-semiconductor silicon photonics and optoelectronic integrated circuits

Hongda Chen, Zan Zhang, Beiju Huang, Luhong Mao, Zanyun Zhang, et al.

Journal of Semiconductors, 2015, 36(12): 121001. doi: 10.1088/1674-4926/36/12/121001
4

Structural, optical and electrical properties of zinc oxide thin films deposited by a spray pyrolysis technique

Yacine Aoun, Boubaker Benhaoua, Brahim Gasmi, Said Benramache

Journal of Semiconductors, 2015, 36(1): 013002. doi: 10.1088/1674-4926/36/1/013002
5

Electrical properties of Ge:Ga near the metal-insulator transition

M Errai, A El Kaaouachi, H El Idrissi

Journal of Semiconductors, 2015, 36(6): 062001. doi: 10.1088/1674-4926/36/6/062001
6

Effect of Co doping on structural, optical, electrical and thermal properties of nanostructured ZnO thin films

Sonet Kumar Saha, M. Azizar Rahman, M. R. H. Sarkar, M. Shahjahan, M. K. R. Khan, et al.

Journal of Semiconductors, 2015, 36(3): 033004. doi: 10.1088/1674-4926/36/3/033004
7

Effects of interface trap density on the electrical performance of amorphous InSnZnO thin-film transistor

Yongye Liang, Kyungsoo Jang, S. Velumani, Cam Phu Thi Nguyen, Junsin Yi, et al.

Journal of Semiconductors, 2015, 36(2): 024007. doi: 10.1088/1674-4926/36/2/024007
8

Effect of band gap energy on the electrical conductivity in doped ZnO thin film

Said Benramache, Okba Belahssen, Hachemi Ben Temam

Journal of Semiconductors, 2014, 35(7): 073001. doi: 10.1088/1674-4926/35/7/073001
9

Performance analysis of silicon nanowire transistors considering effective oxide thickness of high-k gate dielectric

S. Theodore Chandra, N. B. Balamurugan

Journal of Semiconductors, 2014, 35(4): 044001. doi: 10.1088/1674-4926/35/4/044001
10

Structural, morphological, dielectrical and magnetic properties of Mn substituted cobalt ferrite

S. P. Yadav, S. S. Shinde, A. A. Kadam, K. Y. Rajpure

Journal of Semiconductors, 2013, 34(9): 093002. doi: 10.1088/1674-4926/34/9/093002
11

AC-electronic and dielectric properties of semiconducting phthalocyanine compounds:a comparative study

Safa'a M. Hraibat, Rushdi M-L. Kitaneh, Mohammad M. Abu-Samreh, Abdelkarim M. Saleh

Journal of Semiconductors, 2013, 34(11): 112001. doi: 10.1088/1674-4926/34/11/112001
12

Correlation between electrical conductivity-optical band gap energy and precursor molarities ultrasonic spray deposition of ZnO thin films

Said Benramache, Okba Belahssen, Abderrazak Guettaf, Ali Arif

Journal of Semiconductors, 2013, 34(11): 113001. doi: 10.1088/1674-4926/34/11/113001
13

Effect of rhenium doping on various physical properties of single crystals of MoSe2

Mihir M. Vora, Aditya M. Vora

Journal of Semiconductors, 2012, 33(1): 012001. doi: 10.1088/1674-4926/33/1/012001
14

Atomic layer deposition of an Al2O3 dielectric on ultrathin graphite by using electron beam irradiation

Jiang Ran, Meng Lingguo, Zhang Xijian, Hyung-Suk Jung, Cheol Seong Hwang, et al.

Journal of Semiconductors, 2012, 33(9): 093004. doi: 10.1088/1674-4926/33/9/093004
15

Optical and electrical properties of porous silicon layer formed on the textured surface by electrochemical etching

Ou Weiying, Zhao Lei, Diao Hongwei, Zhang Jun, Wang Wenjing, et al.

Journal of Semiconductors, 2011, 32(5): 056002. doi: 10.1088/1674-4926/32/5/056002
16

Optical and electrical properties of electrochemically deposited polyaniline-CeO2 hybrid nanocomposite film

Anees A. Ansari, M. A. M. Khan, M. Naziruddin Khan, Salman A. Alrokayan, M. Alhoshan, et al.

Journal of Semiconductors, 2011, 32(4): 043001. doi: 10.1088/1674-4926/32/4/043001
17

Growth and electrical properties of high-quality Mg-doped p-type Al0.2Ga0.8N films

Zhou Xiaowei, Li Peixian, Xu Shengrui, Hao Yue

Journal of Semiconductors, 2009, 30(4): 043002. doi: 10.1088/1674-4926/30/4/043002
18

Optical and electrical properties of N-doped ZnO and fabrication of thin-film transistors

Zhu Xiaming, Wu Huizhen, Wang Shuangjiang, Zhang Yingying, Cai Chunfeng, et al.

Journal of Semiconductors, 2009, 30(3): 033001. doi: 10.1088/1674-4926/30/3/033001
19

NTC and electrical properties of nickel and gold doped n-type silicon material

Dong Maojin, Chen Zhaoyang, Fan Yanwei, Wang Junhua, Tao Mingde, et al.

Journal of Semiconductors, 2009, 30(8): 083007. doi: 10.1088/1674-4926/30/8/083007
20

Fabrication and Evaluation of Bragg Gratings on Optimally Designed Silicon-on-Insulator Rib Waveguides Using Electron-Beam Lithography

Wu Zhigang, Zhang Weigang, Wang Zhi, Kai Guiyun, Yuan Shuzhong, et al.

Chinese Journal of Semiconductors , 2006, 27(8): 1347-1350.

1. Wang, S., Zhou, Q., Chen, K. et al. Simulation Study of the Use of AlGaN/GaN Ultra-Thin-Barrier HEMTs with Hybrid Gates for Achieving a Wide Threshold Voltage Modulation Range. Materials, 2022, 15(2): 654. doi:10.3390/ma15020654
2. Zhao, S., Yuan, G., Zhang, D. et al. Formation and elimination mechanism of thermal blistering in Al2O3/Si system. Journal of Materials Science, 2021, 56(31): 17478-17489. doi:10.1007/s10853-021-06441-9

    • Search

    Advanced Search >>

    GET CITATION

    Shuxin Tan, Takashi Egawa. Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. Journal of Semiconductors, 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801
    S X Tan, T Egawa, Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. J. Semicond., 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801.
    shu

    Export: BibTex EndNote

    Article Metrics

    Article has an altmetric score of 1
    Article has an altmetric score of 1

    Article views: 3638 Times PDF downloads: 73 Times Cited by: 2 Times

    History

    Received: 28 December 2018 Revised: 08 January 2019 Online: Accepted Manuscript: 19 February 2019Uncorrected proof: 22 February 2019Published: 08 April 2019

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Send
      Article Navigation >  Journal of Semiconductors  > 2019  >  40(4): 042801
      Shuxin Tan, Takashi Egawa. Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. Journal of Semiconductors, 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801 ****S X Tan, T Egawa, Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. J. Semicond., 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801.
      Citation:
      Shuxin Tan, Takashi Egawa. Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. Journal of Semiconductors, 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801 ****
      S X Tan, T Egawa, Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors[J]. J. Semicond., 2019, 40(4): 042801. doi: 10.1088/1674-4926/40/4/042801.
      shu

      Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors

      DOI: 10.1088/1674-4926/40/4/042801
      • 1.

        School of Electronics and Information, Nantong University, Nantong 226019, China

      • 2.

        Research Center for Nano-Device and System, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466-8555, Japan

      More Information
      • Corresponding author: email: tansx2014@ntu.edu.cn
      • Received Date: 2018-12-28
      • Revised Date: 2019-01-08
      • Published Date: 2019-04-01

      Catalog

        Journal of Semiconductors © 2017 All Rights Reserved   京ICP备05085259号-2

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return