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Ultra wideband CMOS digital T-type attenuator with low phase errors

Chao Fan, Yahua Ran and Liqun Ye

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 Corresponding author: Chao Fan, fanchao41@126.com

DOI: 10.1088/1674-4926/43/3/032401

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Abstract: A proposed inductive-phase-compensation ultra wideband CMOS digital T-type attenuator design based on an analysis of minimising phase errors is presented in this letter. In a standard CMOS technology, the proposed attenuator is analytically demonstrated to have low phase errors due to the inductive-phase-compensation network. A design equation is inferred and a wide-band 4dB attenuation bit digital attenuator with low phase errors is designed as a test vehicle for the proposed approach.

Key words: ultra-widebanddigital T-type attenuatorlow phase errorinductive-phase-compensationCMOS



[1]
Sadhu B, Tousi Y, Hallin J, et al. A 28-GHz 32-element TRX phased-array IC with concurrent dual-polarized operation and orthogonal phase and gain control for 5G communications. IEEE J Solid State Circuits, 2017, 52, 3373 doi: 10.1109/JSSC.2017.2766211
[2]
Min B W, Rebeiz G M. A 10–50-GHz CMOS distributed step attenuator with low loss and low phase imbalance. IEEE J Solid State Circuits, 2007, 42, 2547 doi: 10.1109/JSSC.2007.907205
[3]
Ku B H, Hong S. 6-bit CMOS digital attenuators with low phase variations for X-band phased-array systems. IEEE Trans Microw Theory Tech, 2010, 58, 1651 doi: 10.1109/TMTT.2010.2049691
[4]
Zhang L, Zhao C X, Zhang X N, et al. A CMOS K-band 6-bit attenuator with low phase imbalance for phased array applications. IEEE Access, 2017, 5, 19657 doi: 10.1109/ACCESS.2017.2750203
[5]
Ciccognani W, Giannini F, Limiti E, et al. Compensating for parasitic phase shift in microwave digitally controlled attenuators. Electron Lett, 2008, 44, 743 doi: 10.1049/el:20080987
[6]
Sun P P. Analysis of phase variation of CMOS digital. Electron Lett, 2014, 50, 1912 doi: 10.1049/el.2014.2640
[7]
Gu P, Zhao D X, You X H. A DC-50 GHz CMOS switched-type attenuator with capacitive compensation technique. IEEE Trans Circuits Syst I, 2020, 67, 3389 doi: 10.1109/TCSI.2020.2999094
[8]
Zhao C X, Zeng X, Zhang L, et al. A 37–40-GHz low-phase-imbalance CMOS attenuator with tail-capacitor compensation technique. IEEE Trans Circuits Syst I, 2020, 67, 3400 doi: 10.1109/TCSI.2020.2990705
[9]
Yang C C, Yan N, Li T, et al. Design of a wideband CMOS digital step attenuator with high accuracy and low phase error. 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology, 2020, 1 doi: 10.1109/ICSICT49897.2020.9278175
[10]
Koh K J, Rebeiz G M. 0.13-μm CMOS phase shifters for X-, Ku-, and K-band phased arrays. IEEE J Solid State Circuits, 2007, 42, 2535 doi: 10.1109/JSSC.2007.907225
Fig. 1.  Structures of switched T digital attenuator. (a) Typical switched T attenuator. (b) Capacitance/Inductive-phase-compensation T-type attenuator. (c) Structures of the proposed T-type digital differential attenuator. (d) Structures of the proposed T-type digital single-ended attenuator. (e) Phase compensation network.

Fig. 2.  (a) (Color online) The die of the proposed switched T attenuator. (b) Simulated and measured insertion loss phases of reference and attenuating states and phase errors of proposed switched T attenuator. (c) Simulated and measured IL of reference and attenuating states and relative attenuation of proposed switched T attenuator

Table 1.   Comparison of attenuation 4 dB bit attenuators.

ParameterRef. [3]Ref. [4]Ref. [5]TypicalThis paper
Tech.0.18 μm
CMOS
0.18 μm
CMOS
0.18 μm
p-HEMT
0.13 μm
CMOS
0.13 μm
CMOS
BW (GHz)8–1219–218.5–11.55–255–25
IL (dB)8.780.822.3
Phase diff. (°)3.53.8261
Return loss (dB)1012201010
Area (μm2)1250 × 4001300 × 340180 × 60180 × 60
Corr. structureInd. corr.
(170 pH)
Cap. orr.Cap.
corr.
NoInd. corr.
(20 pH)
DownLoad: CSV
[1]
Sadhu B, Tousi Y, Hallin J, et al. A 28-GHz 32-element TRX phased-array IC with concurrent dual-polarized operation and orthogonal phase and gain control for 5G communications. IEEE J Solid State Circuits, 2017, 52, 3373 doi: 10.1109/JSSC.2017.2766211
[2]
Min B W, Rebeiz G M. A 10–50-GHz CMOS distributed step attenuator with low loss and low phase imbalance. IEEE J Solid State Circuits, 2007, 42, 2547 doi: 10.1109/JSSC.2007.907205
[3]
Ku B H, Hong S. 6-bit CMOS digital attenuators with low phase variations for X-band phased-array systems. IEEE Trans Microw Theory Tech, 2010, 58, 1651 doi: 10.1109/TMTT.2010.2049691
[4]
Zhang L, Zhao C X, Zhang X N, et al. A CMOS K-band 6-bit attenuator with low phase imbalance for phased array applications. IEEE Access, 2017, 5, 19657 doi: 10.1109/ACCESS.2017.2750203
[5]
Ciccognani W, Giannini F, Limiti E, et al. Compensating for parasitic phase shift in microwave digitally controlled attenuators. Electron Lett, 2008, 44, 743 doi: 10.1049/el:20080987
[6]
Sun P P. Analysis of phase variation of CMOS digital. Electron Lett, 2014, 50, 1912 doi: 10.1049/el.2014.2640
[7]
Gu P, Zhao D X, You X H. A DC-50 GHz CMOS switched-type attenuator with capacitive compensation technique. IEEE Trans Circuits Syst I, 2020, 67, 3389 doi: 10.1109/TCSI.2020.2999094
[8]
Zhao C X, Zeng X, Zhang L, et al. A 37–40-GHz low-phase-imbalance CMOS attenuator with tail-capacitor compensation technique. IEEE Trans Circuits Syst I, 2020, 67, 3400 doi: 10.1109/TCSI.2020.2990705
[9]
Yang C C, Yan N, Li T, et al. Design of a wideband CMOS digital step attenuator with high accuracy and low phase error. 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology, 2020, 1 doi: 10.1109/ICSICT49897.2020.9278175
[10]
Koh K J, Rebeiz G M. 0.13-μm CMOS phase shifters for X-, Ku-, and K-band phased arrays. IEEE J Solid State Circuits, 2007, 42, 2535 doi: 10.1109/JSSC.2007.907225
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    History

    Received: 19 August 2021 Revised: 11 December 2021 Online: Accepted Manuscript: 15 January 2022Uncorrected proof: 24 January 2022Published: 10 March 2022

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      Chao Fan, Yahua Ran, Liqun Ye. Ultra wideband CMOS digital T-type attenuator with low phase errors[J]. Journal of Semiconductors, 2022, 43(3): 032401. doi: 10.1088/1674-4926/43/3/032401 ****C Fan, Y H Ran, L Q Ye, Ultra wideband CMOS digital T-type attenuator with low phase errors[J]. J. Semicond., 2022, 43(3): 032401. doi: 10.1088/1674-4926/43/3/032401.
      Citation:
      Chao Fan, Yahua Ran, Liqun Ye. Ultra wideband CMOS digital T-type attenuator with low phase errors[J]. Journal of Semiconductors, 2022, 43(3): 032401. doi: 10.1088/1674-4926/43/3/032401 ****
      C Fan, Y H Ran, L Q Ye, Ultra wideband CMOS digital T-type attenuator with low phase errors[J]. J. Semicond., 2022, 43(3): 032401. doi: 10.1088/1674-4926/43/3/032401.

      Ultra wideband CMOS digital T-type attenuator with low phase errors

      DOI: 10.1088/1674-4926/43/3/032401
      More Information
      • Chao Fan:got his PhD from University of Electronic Science and technology, ChengDu, China. He is currently a senior engineer with Chengdu CORPRO technology Co.,Ltd, ChengDu China. His research efforts to IC design, including MMIC, PLL etc
      • Corresponding author: fanchao41@126.com
      • Received Date: 2021-08-19
      • Accepted Date: 2022-01-13
      • Revised Date: 2021-12-11
      • Published Date: 2022-03-10

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